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ALU
说明： 包含一个ALU，实现斐波那契数列的计算。1.接受两个6位二进制输入。2.通过手动输入的时钟驱动每个周期进行一次计算。3.结果输出到led灯（使用NEXYS4开发板）(Including an ALU to realize the calculation of Fibonacci sequence. 1. Accept two 6-bit binary inputs. 2. Each cycle is driven by a clock input manually. 3. Output to LED lamp (using NEXYS4 development board))
- 2019-04-11 14:14:50下载
- 积分：1
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based on VHDL development mcu with external device interface, mcu solve the high
基于VHDL语言开发的mcu与外部器件的接口程序，解决了高速mcu与低速外部器件的接口问题。-based on VHDL development mcu with external device interface, mcu solve the high-speed and low-speed external device interface.
- 2023-06-24 09:15:02下载
- 积分：1
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Reread-machine-program
通过凌阳16位单片机实现复读机的应用的程序。(By Sunplus 16-bit MCU repeater application process.)
- 2011-07-30 16:09:07下载
- 积分：1
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liuy
一个精确时钟的v-log程序，只用一个全局时钟，增加了精确度(An accurate clock in the v-log program, only one global clock, increased accuracy)
- 2010-08-25 12:26:25下载
- 积分：1
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2位并行加法器初学者必看初步了解FPGA
2位并行加法器初学者必看初步了解FPGA-two count
- 2023-07-28 14:05:03下载
- 积分：1
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FDDDDRSDRAMP
一种基于FPGA 实现DDDR SDRAM的控制器
(DDDR SDRAM controller based on FPGA)
- 2012-08-29 23:52:53下载
- 积分：1
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ADI_HDMI
从FPGA输出到HDMI Tx的verilog 模块。实现完整HDMI图像输出功能。(FPGA output to HDMI Tx module in verilog)
- 2020-12-17 11:09:12下载
- 积分：1
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跑马灯程序FPGA
FPGA跑马灯程序,基于CPLD1270开发板的运用程序-Marquee program FPGA-based development board CPLD1270 the use of procedures
- 2022-02-04 16:36:32下载
- 积分：1
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m序列在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过...
m序列在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-m sequence in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim
- 2022-02-02 08:36:01下载
- 积分：1
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它的译码器的VHDL程序
it s vhdl program for decoder
- 2022-11-23 15:15:04下载
- 积分：1
