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emif_tt
实现dsp与fpga的emif的verilog异步实现，可实现异步读写以及相应功能模块控制，文件中包含仿真后的波形图形以及仿真测试程序，运行环境quartus ii11.0，仿真环境mmodelsim se 6.5d(Achieve dsp and fpga verilog asynchronous implementation of the emif, enabling asynchronous reading and writing as well as the corresponding function module control, the document contains graphics, and after the simulation waveform simulation testing procedures, operating environment quartus ii11.0, simulation environment mmodelsim se 6.5d)
- 2020-12-04 15:59:23下载
- 积分：1
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九九乘法器
基于对ROM的编写，在quartusII上实现九九乘法器的实现，在试验箱的四个数码管上分别显示乘数，被乘数，积
- 2022-02-03 19:00:51下载
- 积分：1
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基于fpga和xinlinx ise的串行通信vhdl程序，希望对你有所帮助！
基于fpga和xinlinx ise的串行通信vhdl程序，希望对你有所帮助！-xinlinx and ideally serial communications VHDL process, and I hope to help you!
- 2023-05-29 05:45:03下载
- 积分：1
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异步FIFO的实现可以全面、可核查的]关键词：…
异步FIFO的实现，可综合，可验证]
keywords:almost_full,full,almost_empty,empty-The realization of asynchronous FIFO can be comprehensive, verifiable] keywords: almost_full, full, almost_empty, empty
- 2022-03-14 05:09:12下载
- 积分：1
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Xilinx,Altera,ARM,AVR,S52,Lattice等系列FPGA的下载线电路图和PCB
Xilinx,Altera,ARM,AVR,S52,Lattice等系列FPGA的下载线电路图和PCB-Xilinx, Altera, ARM, AVR, S52, Lattice series FPGA download cable circuit diagram and PCB
- 2022-03-17 00:48:42下载
- 积分：1
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8_1
一个具有置位、复位、左移和右移功能的八位移位寄存器/“01011010”序列检测器。移位寄存器电路端口为：异步清零输入端口rst，输入时钟clk，置数判断输入端口load，移位类型判断输入端口m，数据输入端口data[7:0]，输出端口q[7:0]。序列检测器电路端口为：异步清零输入端口rst，输入时钟clk，串行数据输入端口d，输出标志端口s。(A eight bit shift register / 01011010 sequence detector with set, reset, left shift, and right shift function. Shift register circuit port is: Asynchronous Clear input port rst, input clock CLK, set the number to determine the input port load, shift type to determine the input port m, data input port data[7:0], output port q[7:0]. The sequence detector circuit port is: Asynchronous Clear input port rst, input clock CLK, serial data input port D, output flag port s.)
- 2020-12-17 08:29:12下载
- 积分：1
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TLC7528
fpga驱动TLC7528程序，相当好用，绝对能用(FPGA PROGRAM OF TLC7528)
- 2011-08-17 15:19:03下载
- 积分：1
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常见的几种电机的特征与控制方法
常见的几种电机的特征与控制方法-Several common characteristics of the motor and control method
- 2023-03-02 10:15:03下载
- 积分：1
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VHDL_PWM
FPGA，用VHDL语言产生可调的PWM波(FPGA, VHDL language adjustable PWM wave)
- 2020-12-20 21:29:09下载
- 积分：1
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dds算法的fpga实现 altera
根据不同设置，输出不同频率的信号源...
dds算法的fpga实现 altera
根据不同设置，输出不同频率的信号源-dds algorithm to achieve fpga set according to different altera, the output of the signal source at different frequencies
- 2022-03-02 02:14:19下载
- 积分：1
