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DS18B20LCD
DS18B20温度测量程序 之后用于在LCD显示屏上显示对应的温度(DS18B20 test code)
- 2011-08-30 12:59:20下载
- 积分:1
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Using dual
用双端口ram实现异步fifo,采用格雷码,避免产生毛刺。-Using dual-port ram realize asynchronous fifo, the use of Gray code, avoiding the production of burr.
- 2022-03-15 17:48:50下载
- 积分:1
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用FPGA verilog hdl实现千兆以太网MAC。
用FPGA verilog hdl实现千兆以太网MAC。-Using FPGA verilog hdl realize Gigabit Ethernet MAC.
- 2022-05-10 18:11:05下载
- 积分:1
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67_ellipf
vhdl very good debug release vhdl very good debug release
- 2006-10-22 18:39:48下载
- 积分:1
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ecc算法源码
该源码表述了ecc算法如何用vhdl实现RSA(Ron Rivest,Adi Shamir,Len Adleman三位天才的名字)一样,ECC(Elliptic Curves Cryptography,椭圆曲线密码编码学)也属于公开密钥算
- 2022-03-07 00:08:00下载
- 积分:1
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firfilter
FIR滤波器:自定滤波器的类型(低通,高通或带通)、设计指标(通带截止频率、通带波纹、阻带截止频率、阻带衰减)
1、根据指标选择合适的窗函数,用窗口设计法设计符合指标的FIR滤波器;并验证其性能是否满足预定指标。
(FIR filters: Custom filter types (low pass, high pass or band-pass), design specifications (passband cutoff frequency, passband ripple, stopband cutoff frequency, stopband attenuation) 1, according to indicators choose the right window function, using the window design method of FIR filter designed to meet the targets and verify that its performance meets the set targets.)
- 2010-01-13 19:14:21下载
- 积分:1
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NIOS II IDE 编程, uart_txd测试程序,仅供参考。
NIOS II IDE 编程, uart_txd测试程序,仅供参考。-NIOS II IDE programming, uart_txd testing procedures, for information purposes only.
- 2022-11-30 03:45:03下载
- 积分:1
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shizhong
VHDL写时钟,分频模块什么,实现计时。定点报时,定点闹钟,显示年月日。(verilog HDL)
- 2014-01-09 18:29:40下载
- 积分:1
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这是一个HDB3编码器,可以将普通的二进制序列转化为符合HDB3编码规则的双极性序列...
这是一个HDB3编码器,可以将普通的二进制序列转化为符合HDB3编码规则的双极性序列-This is a HDB3 encoder, can be transformed into an ordinary binary sequences in order to comply with the rules of HDB3 bipolar coding sequence
- 2022-12-15 13:45:03下载
- 积分:1
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ps2_mouse
ps2 mouse controller
- 2008-09-27 21:29:42下载
- 积分:1