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verilog hdl教程135例:verilog hdl语言类似于C语言，便于学习。本文档带有源代码，11...
verilog hdl教程135例:verilog hdl语言类似于C语言，便于学习。本文档带有源代码，11-12章-Verilog HDL 135 cases Guide : Verilog HDL language similar to the C language, to facilitate learning. This document with the source code 11-10-12 Cap
- 2022-04-21 11:48:36下载
- 积分：1
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RFID
RFID防碰撞算法的研究，以及对其各种算法的仿真，以及改进算法的仿真和比较。(RFID anti-collision algorithm, as well as its simulation algorithms, and improved simulation and comparison algorithms.)
- 2020-12-03 09:59:25下载
- 积分：1
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用vhdl来实现的数字频率合成的技术，几乎很全的，所有的都有...
用vhdl来实现的数字频率合成的技术，几乎很全的，所有的都有 -Use VHDL to realize the digital frequency synthesis technology, almost the whole of, all have
- 2022-02-04 17:07:58下载
- 积分：1
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matlabfile
many matlab code with Fftseq ,uniform to gauss
AM DSB FM modulation
- 2009-12-20 14:06:57下载
- 积分：1
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vedic_Code
vedic multiplication
- 2015-11-16 19:19:40下载
- 积分：1
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awgn511
关于5-11APSK在高斯信道中的误码率分析仿真程序，对具体调制方式及解码方式都有详细的过程(About 5-11APSK in Gaussian channel bit error rate analysis simulation program, has a detailed specific modulation and decoding process)
- 2013-03-31 21:56:28下载
- 积分：1
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fpga-fft
xlinx fpga实现fft功能，利用ip核，包含源程序及完整工程文件，直接就能使用(The fft function xlinx fpga ip-core contains the source code and complete the project file, and can be used directly)
- 2013-02-22 10:37:47下载
- 积分：1
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VHDL language used to achieve a display hours, minutes and seconds of the clock:...
用VHDL语言实现一个能显示时、分、秒的时钟：可分别进行时和分的手动校正；12小时、24小时计时制可选，12小时制时有上下午指示；当计时到预定时间（此时间可手动设置）时，扬声器发出闹铃信号，闹铃时间为10秒，可提前终止闹铃。-VHDL language used to achieve a display hours, minutes and seconds of the clock: when can be manually corrected and points 12 hours, optional 24-hour time system, 12-hour on the afternoon of instructions from time to time when the time to the scheduled time (This time can be manually set), the speaker sent alarm signals, alarm time was 10 seconds, the alarm can be terminated prematurely.
- 2022-04-27 22:51:31下载
- 积分：1
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testbench.sv
RS 编码和解码Verilog Code, 实现了RS（544,514)的编码和译码；(-RS Coding and Decoding Verilog code， implement RS（544,514))
- 2016-09-25 16:05:54下载
- 积分：1
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基于fpga和xinlinx ise的串行通信vhdl程序，希望对你有所帮助！
基于fpga和xinlinx ise的串行通信vhdl程序，希望对你有所帮助！-xinlinx and ideally serial communications VHDL process, and I hope to help you!
- 2023-05-29 05:45:03下载
- 积分：1
