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VHDL_count 从 0 到 9 4 7 段 LED 显示 4 脉冲使 (đếm 慈 0 đến 9 hiển 施耐 4 带领 7 đoạn với 4 xung 启用)
VHDL_count 从 0 到 9 4 7 段 LED 显示 4 脉冲使 (đếm 慈 0 đến 9 hiển 施耐 4 带领 7 đoạn với 4 xung 启用)
- 2022-05-29 10:17:32下载
- 积分:1
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ahb2apb_bridge_verification-master
ahb to apb master verification
- 2021-03-23 22:09:15下载
- 积分:1
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Realize with a clock input, can realize multi
实现同一个时钟输入,可以实现多分频,在一个时钟的驱动下-Realize with a clock input, can realize multi-frequency, in a clock-driven
- 2023-02-21 01:50:03下载
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FPGA锁相环实验
说明: FPGA锁相环实验:
顶层文件加底层IP文件构成
top中例化ip核pll(Experiment of Phase-Locked Loop Based on FPGA)
- 2020-06-22 04:00:01下载
- 积分:1
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system c 是在C环境下的硬件描述语言,比VHDL 等语言具有更强的抽象能力,内有system C的开发支持库和一些VC下的开发例程...
system c 是在C环境下的硬件描述语言,比VHDL 等语言具有更强的抽象能力,内有system C的开发支持库和一些VC下的开发例程-system in the C environment hardware description language, than languages such as VHDL is more abstract, C within a system to support the development of the VC and some routines under development
- 2022-08-15 21:55:37下载
- 积分:1
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Xilinx V5 FPGA详细规格、编程FPGA参考,系统设计…
detailed spec for Xilinx V5 FPGA, reference for programming of FPGA, system designer or ASIC designer.
- 2022-04-28 20:14:22下载
- 积分:1
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ANC_LMS
verilog描述的基于LMS的自适应噪声消除器ANC算法。用于数字音频处理。(The verilog Description LMS-based adaptive noise canceller ANC algorithm. For digital audio processing.)
- 2012-10-29 21:43:33下载
- 积分:1
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有用的VHDL源代码
有用的VHDL源代码-useful VHDL source code
- 2023-08-07 09:00:03下载
- 积分:1
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基于FPGA实现数控机床高速运动的DDA设计
本文利用FPGA 可以弥补硬件插补器的不足,是执行速度提高,且可与运动控制部分很好的集成,制成运动控制器,实现高速运动控制
- 2022-03-10 10:19:20下载
- 积分:1
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Frame-synchronizer-
原创,帧同步器的Verilog代码,在FPGA上验证实现过,无误。作为通信系统帧传输的仿真,有限状态机同步态和失步态的切换仿真。(Original Verilog code for frame synchronization, verify the implementation on the FPGA, and correct. Frame transmission as the communication system simulation, finite state machine synchronous state and the loss of the switching simulation of gait.)
- 2012-04-01 19:38:54下载
- 积分:1