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FPGA_Cordic_Atan_A
串行流水线格式:使用COrdic 算法计算反正切:向量模式下求角度 16bit :数据全部补码格式 (Serial line format: Use COrdic algorithm arctangent: seeking angle vector mode 16bit: full complement data format)
- 2014-10-13 20:55:52下载
- 积分：1
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RS(255,247)编码解码器Verilog源代码
说明： RS(255,247)编码解码器Verilog源代码(Verilog source code of RS (255247) codec)
- 2021-02-08 17:09:54下载
- 积分：1
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fht_latest.tar
FAST HADAMARD TRANSFORM VERILOG FOR IMAGE PROCESSING
- 2013-08-19 13:47:40下载
- 积分：1
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calculator_final
清华大学电子课程设计：Verilog，QuartusII可正确运行，可下载到FPGA上，音乐计算器，完成两个三位数的运算，有注释，很强大！！(Verilog, QuartusII run correctly, can be downloaded to the FPGA, music, calculator, completed two three-digit operations, there are notes, very powerful! !)
- 2020-08-16 23:38:25下载
- 积分：1
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EDA VHDL modules commonly used procedure, the time
EDA中常用模块VHDL程序，不同时基的计数器由同一个外部是中输入时必备的分频函数。分频器FENPIN1/2/3(50分频=1HZ，25分频=2HZ，10分频=5HZ。稍微改变程序即可实现)-EDA VHDL modules commonly used procedure, the time- with a counter by the external input is required when the sub-frequency functions. Frequency Divider FENPIN1/2/3 (50 1HZ frequency = 25 = 2HZ-frequency, frequency = 10 points Stripper. A slight change in procedure can be realized)
- 2022-07-02 21:52:46下载
- 积分：1
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ofdm_modulation
OFDM modulation source code written in Matlab
- 2009-06-01 17:52:44下载
- 积分：1
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Verilog based on the eight
基于Verilog的八层电梯设计，能够实现自动化的电梯控制。-Verilog based on the eight-lift designed to automate the elevator control.
- 2022-08-13 02:17:13下载
- 积分：1
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HDB3
FPGA实验_HDB3编码器设计(包含5个模块)(FPGA design experiments _HDB3 encoder (including 5 modules))
- 2020-11-30 10:29:28下载
- 积分：1
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vhdl经典源代码――LCD控制，入门者必须掌握
vhdl经典源代码――LCD控制，入门者必须掌握-vhdl classical source code-- LCD control, beginners must master
- 2022-03-20 08:17:37下载
- 积分：1
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and-gate
programming of and gate
- 2016-11-22 14:30:48下载
- 积分：1
