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IRIG_DC_Decoder
IRIG_B解码器,直接解码IRIG_B DC(IRIG_B decoder)
- 2021-04-09 16:58:59下载
- 积分:1
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Design-of-taxi-meter-Based-on-FPGA
本文分析了当前国内外出租车计费系统的基本组成和工作原理及主要的两种设计方式:基于单片机的设计方式和基于FPGA的设计方式;并对这两种实现方式的优点和缺点进行分析,比较后确定本系统的方案:基于FPGA的出租车计费系统的设计。(This paper analyzes the current taxi charging system at home and abroad, working principle and basic components of two major design approach: the design methods based on single chip FPGA-based design approach and the two implementations to analyze the strengths and weaknesses, After comparing the program to determine the system: FPGA-based taxi billing system.)
- 2011-05-11 15:38:37下载
- 积分:1
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Ldpc_DecodeV1
block-LDPC 译码VHDL 源代码(block-LDPC decode VHDL source)
- 2011-09-13 11:28:53下载
- 积分:1
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I121-v1.10
Implementation of Serial Infrared decoder for low-speed IrDA communications.
- 2013-06-14 05:38:14下载
- 积分:1
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GAL16V8反汇编源程序JED2ABEL.C 把jec汇编成abel文件
GAL16V8反汇编源程序JED2ABEL.C 把jec汇编成abel文件-GAL16V8 disassemble source JED2ABEL.C the JEC document compiled abel
- 2022-03-24 15:17:02下载
- 积分:1
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0720_03_AD_uart
说明: 基于fpga的verilog实现ad及uart,并进行仿真验证(Verilog based on FPGA implements AD and uart, and carries out simulation verification)
- 2019-01-21 20:52:46下载
- 积分:1
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数字钟的实现 FPGA上运行 VHDL编写
数字钟的实现 FPGA上运行 VHDL编写-Digital clock running on the FPGA to achieve the preparation of VHDL
- 2023-08-20 09:25:06下载
- 积分:1
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BulkIn是FPGA向CY7C68013发送数据
BulkOut是FPGA从CY7C68013接收数据,可以用LED显示...
BulkIn是FPGA向CY7C68013发送数据
BulkOut是FPGA从CY7C68013接收数据,可以用LED显示
-BulkIn is the FPGA to the CY7C68013 is BulkOut send data CY7C68013 receive data from the FPGA, you can use LED display
- 2022-08-15 04:42:44下载
- 积分:1
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DDR2 SDRAM 控制器的FPGA实现
DDR2 SDRAM 控制器的FPGA实现-DDR2 SDRAM controller FPGA to achieve
- 2022-03-22 23:48:44下载
- 积分:1
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Pipeline-2
Pipeline processor verilog components
- 2012-12-21 17:53:18下载
- 积分:1