-
Altera 基础篇公司书籍源码
Altera 基础篇公司书籍源码-Altera Corporation based on chapter books-source
- 2022-10-29 10:20:03下载
- 积分:1
-
fifo
一个FIFO产生程序,主要是一个格雷码的加法器(A FIFO generation process, is primarily a gray code adder)
- 2011-08-28 10:39:31下载
- 积分:1
-
cordic
cordic算法,实现加减乘除、幂次方、开方的运算(CORDIC algorithm implementation, power add, subtract, multiply and divide and square root operations)
- 2020-06-29 14:00:01下载
- 积分:1
-
gtwizard_254_127_ex_1113_3
说明: 配置GTH ip的例子工程,选用7 series 芯片的GTH 113quad的四个通道,在程序中每个链路利用自己的恢复时钟进行数据解码,所以四个通道可以各自独立运行;成功工作在2.54Gb/s的链路状态,长时间(>24小时)的测试,误码率一直为0.(The GTH ip example project is configured with four channels of the GTH 113quad of the 7 series chip. Each link in the program uses its own recovery clock for data decoding, so the four channels can operate independently; the successful operation is at 2.54Gb/ The link state of s, long time (>24 hours) test, the bit error rate has been 0.)
- 2019-06-17 21:33:56下载
- 积分:1
-
ALTERA上DE2平台,利用内部50M Hz时钟,在数码管模拟显示时间(时分秒)。
ALTERA上DE2平台,利用内部50M Hz时钟,在数码管模拟显示时间(时分秒)。-ALTERA on DE2 platform, using internal 50M Hz clock, in the digital control simulation show time (hours minutes and seconds).
- 2022-04-17 01:14:39下载
- 积分:1
-
rs232
异步串行传输的verilog hdl 功能文件以及测试文件(The verilog hdl source and the testbench of asynchronous serial transmission )
- 2009-12-27 16:02:38下载
- 积分:1
-
the_last
VHDL语言实现两个人掷骰子游戏,最多6次,大者胜则结束游戏并在点阵上显示,一直平手则一直进行直到达到6次。(Achieving the dice game between two people by using VHDL language.The maximum number of times is 6.The game will over when there is a biger one in one time,otherwise,the game will continue until the time of the game is up to 6.)
- 2021-01-21 12:18:42下载
- 积分:1
-
FP代码是用来实现aritjmetics
fp codes is used to realize the aritjmetics
- 2022-03-26 07:19:34下载
- 积分:1
-
VESA Timing
VESA CVT视频参数计算器,输入分辨率和刷新率即可得到需要参数。(VGA Timing Calculator)
- 2020-12-23 14:29:07下载
- 积分:1
-
VHDL写的串口,很好用,程序非常简单,可以调试用
VHDL写的串口,很好用,程序非常简单,可以调试用-Written in VHDL serial, very good, and the procedure is very simple, you can debug with
- 2022-08-08 18:58:10下载
- 积分:1