-
shumagua
通过数码管和单片机的组合 制作成的数码管时钟程序(Through the combination of digital control and made into a single-chip digital clock program)
- 2013-10-27 12:30:04下载
- 积分:1
-
ldpc_decoder_802_3an
LDPC的编码模块和解码模块,实现802-3an协议的编码(The module of LDPC to implement the coding of the 802-3an protocol)
- 2018-07-23 15:01:20下载
- 积分:1
-
digital_clock
说明: 数字钟通过verilog实现,并且支持Modelsim仿真,通过实验验证(The digital clock is implemented by Verilog and supports Modelsim simulation)
- 2020-06-18 05:00:02下载
- 积分:1
-
keyscan
用verilog语言写的简单的键盘扫描代码,适合初学者,用alter的软件编写的程序代码。(Using verilog language to write simple keyboard scan code, suitable for beginners, with alter software program written code.)
- 2013-09-13 22:59:11下载
- 积分:1
-
AD6 中进行FPGA设计与仿真
说明: AD6 中进行FPGA设计与仿真,很不错的资料哦(FPGA design and Simulation in AD6, very good data)
- 2020-04-15 21:22:17下载
- 积分:1
-
DDS
文利用直接数字频率合成器(DDS)与CPLD技术和单片机控制技术,研制和
设计了高分辨率、高稳定度的函数信号发生(Wen using direct digital frequency synthesizer (DDS) and CPLD technology and single-chip microcomputer control technology, development and
Design of high resolution, high stability function of the signal
)
- 2013-08-27 14:20:22下载
- 积分:1
-
Regs
说明: 一个小寄存器堆,使用参数化编程,附有仿真代码,可直接在vivado(2018.2版本及以后)上运行(A small register heap, using parametric programming)
- 2019-04-03 14:19:55下载
- 积分:1
-
electric-8.08
The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that can handle many forms of circuit design, including:
* Custom IC layout
* Schematic Capture (digital and analog)
* Textual Languages such as VHDL and Verilog
(The ElectricTM VLSI Design System is an open-source Electronic Design Automation (EDA) system that can handle many forms of circuit design, including:* Custom IC layout* Schematic Capture (digital and analog)* Textual Languages such as VHDL and Verilog)
- 2009-01-09 20:01:17下载
- 积分:1
-
DATA_scramble
扰码器的verilog实现,参考802.11a相关标准(Scrambler in verilog implementation)
- 2009-12-20 16:44:15下载
- 积分:1
-
task_function
自己编写的一个verilog HDL小程序,实现基本的task调用function的功能,对初学者有用。在xilinx的ISE仿真调试通过(I have written a verilog HDL small procedures, to achieve the basic function of the task to call the function, useful for beginners. In Xilinx s ISE simulation debugging through)
- 2008-06-26 21:21:23下载
- 积分:1