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scope_VGA
利用IIC接口的4路 ADC max1037,采集思路信号,通过在FPGA内部的构建DeltaSigma DAC软核,在VGA液晶显示屏上显示波形。 (IIC interface 4-way ADC max1037, collecting ideas signal the FPGA internal build DeltaSigma DAC soft-core VGA LCD display waveforms.)
- 2012-07-24 00:41:29下载
- 积分:1
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OFDM_FPGA
采用FPGA 来实现一个基于OFDM 技术
的通信系统中的基带数据处理部分,即调制解调器。其中发射部分的调制
器包括:信道编码(Reed-Solomon 编码),交织,星座映射,FFT 和插
入循环前缀等模块。(FPGA to implement a baseband data based on OFDM technology in the communication system processing section, namely modem. Transmitter modulator includes: channel coding (Reed-Solomon coding), interleaving, constellation mapping, FFT and insert the cyclic prefix modules.)
- 2012-05-22 14:28:42下载
- 积分:1
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uaf42
使用uaf42设计的有源滤波器,高通滤波器的设计参数记录(Using uaf42 design active filters, high-pass filter design parameters recorded)
- 2012-09-09 21:49:49下载
- 积分:1
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tb_modular
Matlab to hdl code for Least_square testbench
- 2020-06-17 12:20:02下载
- 积分:1
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a good use of the Verilog Programming cpu procedures, we must make good use of.
一个很好的利用verilog编程实现的cpu程序,一定要好好利用。-a good use of the Verilog Programming cpu procedures, we must make good use of.
- 2023-03-28 18:35:03下载
- 积分:1
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mutiplier
说明: 用VHDL语言仿真乘法器设计, 经过modelsim仿真, synplify综合,并下载进FPGA验证(Multiplier design using VHDL, simulation, after modelsim simulation, synplify synthesis, and downloaded into a FPGA verification)
- 2009-08-28 13:28:04下载
- 积分:1
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and they simply based on the mouse xinlinx ideally VHDL application procedures,...
基于fpga和xinlinx ise的鼠标应用vhdl程序,希望对你有所帮助!-and they simply based on the mouse xinlinx ideally VHDL application procedures, and I hope to help you!
- 2022-02-18 14:46:28下载
- 积分:1
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作者:新舜唐日期:2008
--author: Suntion Tang
--date: 2008-6-7
-- two warning
--modify: By Suntion Tang at 2008-6-14
--description: 顶层文件,由于此系统简单,
-- 且底层文件不多,故放弃原理图描述,采用VHDL语言描述-author: Suntion Tang date: 2008-6-7 two warning modify: By Suntion Tang at 2008-6-14 description: the top-level documents, as a result of this system is simple, and not more than the bottom of a document, they give up the schematic description of the use of VHDL language description
- 2022-04-23 09:59:29下载
- 积分:1
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Altera FPGA IP core of the source code for the use of Altera FPGA design to prov...
ALTERA的FPGA的IP核的源代码,为使用ALTERA的FPGA的相关设计提供参考.-Altera FPGA IP core of the source code for the use of Altera FPGA design to provide the relevant information.
- 2022-04-30 06:15:53下载
- 积分:1
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ethmac10g
千兆以太网设计,包括组包解包,可以实现大数据传输功能。(Unpack the gigabit Ethernet is designed, including group package, can realize large data transfer function.)
- 2020-09-01 16:48:09下载
- 积分:1