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dianzhen
如果需要用verilog设计一项比较简单的功能，那么这个浅显易懂的程序能让你很快明白点阵的设计方法，尤其是对那些初学者(If you need to use a relatively simple verilog design features, then this easy to understand design of the program allows you to quickly understand the lattice method, especially for those who are beginners)
- 2014-01-16 16:13:53下载
- 积分：1
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基于VHDL的自动售货机实现,包含完整的源代码,锁脚文件以及下载文件
基于VHDL的自动售货机实现,包含完整的源代码,锁脚文件以及下载文件-VHDL-based vending machine realize that contains the complete source code, locking pin, as well as download files documents
- 2022-07-09 00:04:25下载
- 积分：1
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RS
说明： 通过verilog hdl语言实现RS编码器与译码器的设计(Verilog hdl language through the RS encoder and decoder design)
- 2013-07-18 16:09:22下载
- 积分：1
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alu2
verilog alu 8bit for engineers
- 2011-05-26 11:32:21下载
- 积分：1
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TugasUAS_AuditTI_1504505017_Reguler
说明： ertyguhijop[lkjhvbn hiouopi][[poiuy
- 2019-02-05 09:18:23下载
- 积分：1
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scramble
基于VHDL实现加扰器解扰器的设计，与仿真。(VHDL-based scrambler descrambler design and simulation.)
- 2013-01-11 20:15:54下载
- 积分：1
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016_versat_updown_counter
说明： Verilog实现的加减法功能计数器，通过独立的自增自减信号控制计数器进行自增计数和自减计数(Function counter of addition and subtraction implemented by Verilog)
- 2019-11-27 23:16:27下载
- 积分：1
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SPWM
利用FPGA内核产生SPWM波，并且频率可调(The FPGA kernel is used to generate SPWM waves, and the frequency is adjustable)
- 2020-12-08 20:19:19下载
- 积分：1
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exercise
使用verilog硬件设计语言在FPGA板子上STOPWATCH 秒表设计。(Using verilog hardware design language STOPWATCH stopwatch design on FPGA board.)
- 2014-02-20 16:20:33下载
- 积分：1
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uaf42
使用uaf42设计的有源滤波器，高通滤波器的设计参数记录(Using uaf42 design active filters, high-pass filter design parameters recorded)
- 2012-09-09 21:49:49下载
- 积分：1
