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phase_test
VHDL,简易音频数字相位表的设计与实现 数字相位测量仪在工业领域中经常用到的一般测量工具，主要应用与同频率正弦信号间的相位差的测量显示。
本系统采用FPGA实现测量的核心部分，主要由数字鉴相、累加计数器、控制器以及寄存与显示译码电路组成。该系统硬件电路简单，整个系统采用硬件描述语言VHDL作为系统内部硬件结构的描述手段，在XILINX公司的ISE9.1的软件支持下完成。可以对20Hz~20kHz频率范围内的音频信号进行采样鉴相处理，并将数据传回FPGA进行相位差计数累加、测量运算，最后送显示译码电路显示，测相范围为 ，相位测量误差 < 。
经测试结果验证，本系统充分利用FPGA对数据的高速处理能力，是系统设计高效、可靠，处理速度快，稳定性高，易于实现。
(VHDL, simple audio digital phase Table Design and Implementation of the digital phase meter general measurement tools are often used in the industrial field, the measurement of the phase difference between the main application with the same frequency sinusoidal signal. The system uses the FPGA implementation of the core part of the measurement, mainly by the digital phase, cumulative counter, the decoding circuit of the controller as well as storage and display. The system hardware circuit is simple, and the entire system using hardware description language VHDL system means a description of the internal hardware structure, completed in the XILINX company ISE9.1 software support. The audio signal in the frequency range of 20Hz ~ 20kHz sampling KAM-phase process, and the data returned FPGA retardation counted accumulation measuring operation, and finally sent to the decoding circuit, the scope of the measurement phase, the phase measurement error < . The test results verify the full u)
- 2012-09-24 10:11:57下载
- 积分：1
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这是8位微处理器的Verilog源代码，可以欠在Flex10k10里面
这是8位微处理器的Verilog源代码，可以欠在Flex10k10里面-This is the 8-bit microprocessor Verilog source code, can they owed in Flex10k10
- 2022-02-06 13:26:07下载
- 积分：1
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gam7
FPGA Implementation ofLow Power 64-Point
Radix-4 FFT Processor for OFDM System
- 2011-01-22 11:45:44下载
- 积分：1
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Avalon_VGA_Controller
基于ALTERA AVALON BUS 的 VGA Controller 设计(ALTERA AVALON BUS VGA Controller )
- 2014-09-23 21:07:40下载
- 积分：1
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用VHDL语言实现CPLD（EPM240T100C5组成）串口接收程序
利用VHDL实现CPLD（EPM240T100C5）的串口接收程序-Using VHDL realize CPLD (EPM240T100C5) the serial receive procedure
- 2022-05-20 12:04:11下载
- 积分：1
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VHDL 快速参考手册，简要概括了VHDL，非常适合做开发参考
VHDL 快速参考手册，简要概括了VHDL，非常适合做开发参考-VHDL Quick Reference Guide, a brief summary of VHDL, is well suited to do the development of reference
- 2022-06-13 15:47:21下载
- 积分：1
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用VHDL写的计算器，实现加减功能以及ＶＧＡ显示功能，适合VHDL初学者使用。...
用VHDL写的计算器，实现加减功能以及ＶＧＡ显示功能，适合VHDL初学者使用。-VHDL write calculators, Modified functions and achieve VGA display, VHDL for beginners.
- 2022-06-12 21:10:47下载
- 积分：1
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DPD_project
预失真算法中，包络解波部分的verilog代码，有部分错误(envelope calculation of DPD algorithm ，verilong HDL language)
- 2014-04-26 15:45:21下载
- 积分：1
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HB1
半带滤波器，用于sigma-delta DAC中的设计(Half-band filter for sigma-delta DAC design)
- 2020-12-23 10:29:06下载
- 积分：1
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01-USB
usb读取，仅供参考，在实际应用中要更改以下数据。(Read usb data)
- 2012-12-24 15:35:40下载
- 积分：1
