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is61lv25616 (1)
verilog测试,fpga测试片外sramis61lv25616,256个k个字,16位,比较难调(it is fpga is 61lv25616 simple verilog program,complete sram read and write.it can read and write .)
- 2020-12-09 15:39:18下载
- 积分:1
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实验17 ADC实验
说明: 鉴于stm32在keil平台上的ADC采集转化,在LCD屏上显示程序(voltage acquisition adc)
- 2020-06-20 12:40:02下载
- 积分:1
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lut_multiplier
使用verliog设计实现LUT查找表乘法器,通过modelsim仿真验证通过(Designed and implemented using the LUT lookup table verliog multipliers, through simulation by modelsim)
- 2021-04-09 10:18:59下载
- 积分:1
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北斗定位系统卫星下行信号的基带处理部BDSSS-Transmie
北斗定位系统卫星下行信号的基带处理部分——基于FPGA的的直接序列扩频发射机的设计与仿真。,已通过测试。
(Beidou positioning system satellite downlink signal baseband part- based on the design and simulation of the FPGA direct sequence spread spectrum transmitter. , Has been tested.)
- 2012-10-04 00:05:36下载
- 积分:1
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ulpi_port
ULPI UTMI conversion
- 2015-03-12 14:59:25下载
- 积分:1
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shperedecode
基于软输出固定复杂度球形译码的高效迭代检测算法,最新的球形译码论文(Iterative detection algorithm based on a fixed complexity soft-output sphere decoding efficiency, sphere decoding papers)
- 2012-09-07 20:36:21下载
- 积分:1
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VCS使用中文教程
说明: vcs中文使用教程,帮助你快速入门Linux下的VCS操作(VCs Chinese tutorial to help you get started with VCs operation under Linux)
- 2020-07-01 23:00:02下载
- 积分:1
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入门,verilog语言,实现字符型液晶1602的显示,及按键控制
入门,verilog语言,实现字符型液晶1602的显示,及按键控制-verilog
- 2022-07-19 01:27:34下载
- 积分:1
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just division the clock into 2
just division the clock into 2
- 2022-01-26 05:48:15下载
- 积分:1
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基于FPGA的交通灯的设计 有Verilog HDL 源码、仿真图与引脚配置图,已下载实现...
基于FPGA的交通灯的设计 有Verilog HDL 源码、仿真图与引脚配置图,已下载实现
-FPGA-based design of traffic lights have Verilog HDL source code, simulation map with pin configuration map has been downloaded realize
- 2022-06-27 19:08:32下载
- 积分:1