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SoC sample Code using Altera Xcaliber, good usefull SoC.
SoC sample Code using Altera Xcaliber, good usefull SoC.
- 2022-02-04 17:46:18下载
- 积分：1
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vhdl4
VHDL Language Reference courses part4
- 2010-02-10 00:52:53下载
- 积分：1
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verilog编写的状态机检测00100序列.
实现 input:...011000010010000...
output:...0000000001...
verilog编写的状态机检测00100序列.
实现 input:...011000010010000...
output:...000000000100100...
并且 用测试模块来验证状态是否正确工作-verilog prepared by the state machine detected 00,100 sequences. Achieve input : ... ... 011000010010000 output : 000000000100100 ... ... and test module used to verify the state is working
- 2022-06-16 14:06:28下载
- 积分：1
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FPGA
FPGA的学习指南，绝对经典，内容比较超值，我已经细心读过了，讲解清晰，快速入门。-FPGA-study guide, an absolute classic, the content of more value, I have carefully read, and to explain clearly, Getting Started.
- 2023-07-28 14:25:03下载
- 积分：1
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DIGITAL-PID
Use verilog language design DIGITAL-PID source
- 2016-12-26 09:41:15下载
- 积分：1
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fht_latest.tar
FAST HADAMARD TRANSFORM VERILOG FOR IMAGE PROCESSING
- 2013-08-19 13:47:40下载
- 积分：1
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VHDL小程序（本人的一些小成绩哦，希望对大家有帮助）
VHDL小程序（本人的一些小成绩哦，希望对大家有帮助）-VHDL small programs (some of my small achievements Oh, we want to help)
- 2022-03-03 18:24:48下载
- 积分：1
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Encoder_SSI_Veryilog
说明： 本文详细描述了SSI协议的通讯格式、原理及应用电路,并采用verilog语言实现了SSI通讯协议.设计实用电路并实现了与绝对值编码器的通讯(SSI protocol described in detail the communication format, principle and application circuit, and use verilog language of the SSI protocol. Practical circuit design and implementation of the communication with the absolute encoder)
- 2020-12-28 20:59:02下载
- 积分：1
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任意基数分频VERILOG代码，经过了编译，可以修改数字改变分频。...
任意基数分频VERILOG代码，经过了编译，可以修改数字改变分频。-Arbitrary base frequency Verilog code, after compilation, the figures can be amended to change the frequency.
- 2022-08-10 12:37:41下载
- 积分：1
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This procedure for the serial communication procedures, the use of Verilog langu...
此程序为串行通信程序,采用verilog语言编写的,经过仿真验证已经通过.-This procedure for the serial communication procedures, the use of Verilog language, after simulation has been adopted.
- 2022-04-22 21:51:37下载
- 积分：1
