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8b10b
8b10b编解码，用于光通信和千兆以太网，verilog编写，已验证(8b10b codec for optical communications and Gigabit Ethernet, verilog prepared Verified)
- 2021-01-27 09:48:41下载
- 积分：1
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等精度频率计的verilogHDL的实现,我花了好长时间才写的哦
等精度频率计的verilogHDL的实现,我花了好长时间才写的哦
- 2022-06-28 09:27:01下载
- 积分：1
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一个简易的数字频率计，可以对一个输入的信号频率进行测量并显示输出，适合VHDL的初学者...
一个简易的数字频率计，可以对一个输入的信号频率进行测量并显示输出，适合VHDL的初学者-A simple digital frequency meter, you can enter the signal of a frequency measurement and display output, suitable for beginners VHDL
- 2022-06-20 21:46:49下载
- 积分：1
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四选一选择器,输入四个,输出1个.当NM=00时选A 当NM=01时选B 当NM=10时选C 当NM=11时选D...
四选一选择器,输入四个,输出1个.当NM=00时选A 当NM=01时选B 当NM=10时选C 当NM=11时选D-four elected a selector, the importation of four, Output 1. When NM = 00 A at the election when NM = 01 am when the election NM B = C 10:00 when the election NM = 11:00 election D
- 2023-04-13 16:10:03下载
- 积分：1
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Synopsys 8051 IP core documentation.
Synopsys 8051 IP core documentation.
- 2022-06-26 21:44:13下载
- 积分：1
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FPGA SDRAM with the operation of the specific see internal note
用FPGA实现SDRAM的操作，具体操作见内部说明文件-FPGA SDRAM with the operation of the specific see internal note
- 2022-01-22 01:54:54下载
- 积分：1
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该项目是用于执行4位arethmatic操作和逻辑操作…
The project is used to perform the operation of 4 bit arethmatic and logical operation. the projcet is implemented in spartan 3E
- 2022-03-21 15:49:24下载
- 积分：1
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MUX
说明： 用CASE实现4选1数据选择器 很实用 运用VERILOG(Using CASE to achieve 4 election 1 Data Selector practical use Verilog)
- 2008-09-11 11:37:35下载
- 积分：1
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breathingLED
stc12c5a60s2单片机做的两路呼吸灯，可以用ad和按键控制闪动频率(stc12c5a60s2 SCM done with the two breathing lights, you can use the ad and buttons to control the flashing frequency)
- 2013-05-10 15:33:18下载
- 积分：1
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9_ImageMorphologic
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像形态学部分,腐蚀,膨胀,细化算法(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image morphology section, corrosion, swelling, thinning algorithm)
- 2020-10-23 17:17:22下载
- 积分：1
