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cpu
用全加器设计8位运算器逻辑电路图
2、根据逻辑电路用 VHDL编程实现
3、调试编译通过后,仿真
(this file can help you learn the design of cpu)
- 2010-01-05 09:56:11下载
- 积分:1
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AVS motion compensation circuit of VLSI Design and Implementation of a standard...
AVS运动补偿电路的VLSI设计与实现
提出了一种基于AVS标准的高效的运动补偿电路硬件结构,该设计采用了8 X 8块级流
水线操作,运动矢量归一化处理和插值滤波器组保证了流水线的高效运行以及硬件资源的最优
利用。采用Verilog语言完成了VLSI设计,并通过EDA软件给出仿真和综合结果。-AVS motion compensation circuit of VLSI Design and Implementation of a standard based on the AVS motion compensation circuit efficient hardware structure, the design used 8 X 8 block-level pipelining, the normalized motion vector processing and interpolation filter bank guarantee efficient operation of the pipeline, as well as the optimal use of hardware resources. Using Verilog language completed VLSI design and EDA software through simulation and synthesis results.
- 2022-01-21 20:19:47下载
- 积分:1
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AD9914原理图和gerber以及BOM表
说明: DDS VHDL include everything of dds
AD9914
- 2019-06-03 09:40:52下载
- 积分:1
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Fmc880511P
可在FPGA上运行的8051 IP coore,是学习FPGA及SPOC的好资料。
(8051 IP coore, can be run on the FPGA is good information to learn FPGA and SPOC.)
- 2012-06-11 18:59:13下载
- 积分:1
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用FPGA实现数字锁相环,开发环境为ISE
用FPGA实现数字锁相环,开发环境为ISE-Using FPGA digital phase-locked loop, development environment for ISE
- 2022-06-22 05:34:34下载
- 积分:1
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mini_cpu_verilog
用verilog写的简单的CPU,有详细注释(Use verilog to write a simple CPU, with detailed notes)
- 2011-07-16 09:20:27下载
- 积分:1
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";Verilog HDL设计指南";5
《Verilog HDL 程序设计教程》5-"Verilog HDL Design Guide" 5
- 2022-04-21 22:39:14下载
- 积分:1
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fpga1394
这是一段控制1394芯片的cpld的verilog程序,可以参考,在实际项目中已经采用.(This is a control chip cpld 1394 Verilog the procedures, they can refer to the actual project has been adopted.)
- 2005-03-31 16:09:51下载
- 积分:1
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用VHDL语言仿真交通灯
用VHDL语言仿真交通灯
用VHDL语言仿真交通灯
用VHDL语言仿真交通灯-Simulation using VHDL language VHDL language with traffic lights traffic lights Simulation
- 2022-01-26 03:57:23下载
- 积分:1
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Simulation using VHDL language songs Andy Lau
用VHDL语言仿真歌曲刘德华的《月老》
-Simulation using VHDL language songs Andy Lau
- 2023-08-15 11:20:05下载
- 积分:1