登录
首页 » VHDL » 该源码为VHDL语言编写的分频器,在W

该源码为VHDL语言编写的分频器,在W

于 2022-01-24 发布 文件大小:108.58 kB
0 126
下载积分: 2 下载次数: 1

代码说明:

该源码为VHDL语言编写的分频器,在W-4b教学平台上通过验证-The VHDL source for the prescaler languages, W-4b in the teaching platform validated

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • Can be directly used for engineering applications of CRC checksum inside VHDL co...
    可以直接用于工程应用的crc校验VHDL编码 里面有详细的规格书-Can be directly used for engineering applications of CRC checksum inside VHDL code has detailed specifications
    2022-08-03 19:10:27下载
    积分:1
  • cordic
    基于VHDL语言编写,可下载到FPGA板子上实现的cordic算法实现的设计,并用该算法实现sin和cos的计算,计算结果显示在数码显示管上,已包含按键防抖动功能的实现。(Based on VHDL language, can be downloaded to the the cordic algorithm implemented in the FPGA board to achieve the design and calculation of sin and cos using this algorithm, the results displayed on the digital display tube is included on the function of the realization of the button shake.)
    2013-03-21 16:52:41下载
    积分:1
  • bmistree_Project_Proposal
    project proposal of verilog language that is gud for beginners
    2011-04-25 00:31:03下载
    积分:1
  • 基于Actel A3P030 FPGA液晶显示器使用jdl12864串行接口,时钟可调
    基于Actel A3P030 FPGA,液晶采用JDL12864串行接口,时钟48MHz-Based on Actel A3P030 FPGA, LCD using JDL12864 serial interface, clock 48MHz
    2022-07-05 03:00:11下载
    积分:1
  • 775dbfc273b27329d455f8257e85d839cc5d
    CPFSK Demodulation Techniques
    2018-09-18 17:31:30下载
    积分:1
  • SMBus
    SMBus控制器的VHDL源码程序,适用于Quartus2,ISE等开发环境。(The SMBus controller VHDL source code procedures applicable to Quartus2 ISE development environment.)
    2021-03-24 18:39:14下载
    积分:1
  • dianzhen
    如果需要用verilog设计一项比较简单的功能,那么这个浅显易懂的程序能让你很快明白点阵的设计方法,尤其是对那些初学者(If you need to use a relatively simple verilog design features, then this easy to understand design of the program allows you to quickly understand the lattice method, especially for those who are beginners)
    2014-01-16 16:13:53下载
    积分:1
  • 利用FPGA实现频率测试,基于VHDL实现,具有良好的测试性能可直接使用...
    利用FPGA实现频率测试,基于VHDL实现,具有良好的测试性能可直接使用-Realize the frequency of testing the use of FPGA-based VHDL realize, has a good test performance can be directly used
    2022-07-06 19:40:12下载
    积分:1
  • gps
    基于fpga和dsp架构的gps接收机的设计和实现(Design and Implementation of gps Receiver Based on fpga)
    2017-05-25 17:44:51下载
    积分:1
  • 数字秒表的VHDL设计,能精确到百分秒,在6位数码管上显示,分别有秒,分,小时,通过目标芯片EPF10KLC84...
    数字秒表的VHDL设计,能精确到百分秒,在6位数码管上显示,分别有秒,分,小时,通过目标芯片EPF10KLC84-4验证-VHDL design of digital stopwatch, accurate to the percentage of seconds in the six digital tube display, respectively, have seconds, minutes, hours, through the target chips EPF10KLC84-4 verification
    2022-07-20 17:58:12下载
    积分:1
  • 696516资源总数
  • 106571会员总数
  • 2今日下载