-
LEDTest2
This is a running 10 bit led on VHDL code including switch to shift from increasing or decreasing
- 2017-10-28 16:27:20下载
- 积分：1
-
ahb_master_monitor
AHB master monitor for verification
- 2015-04-03 19:38:06下载
- 积分：1
-
daojishi
用VHDL实现60秒倒计时的功能
倒计时为0时蜂鸣器持续响起(Continued sounded to achieve 60 seconds of the countdown function with VHDL countdown to the 0:00 buzzer)
- 2021-05-07 07:28:36下载
- 积分：1
-
encode_64_66
自编的64B/66B编码程序，下次上传解码程序。(the 64B/66B coding process is written by myself, i will upload the decoding process next time.)
- 2011-08-27 10:38:53下载
- 积分：1
-
Input from the MIC for some audio and then AOUT interface from broadcast in the...
从MIC输入一段音频然后，再从AOUT的接口播放出来的verilog 的代码-Input from the MIC for some audio and then AOUT interface from broadcast in the Verilog code
- 2023-06-09 21:15:03下载
- 积分：1
-
Nexys-4-DDR-XADC
Nexys-4-DDR-XADC 开发板demo(Nexys-4-DDR-XADC e.v. Board demo)
- 2018-12-07 15:33:22下载
- 积分：1
-
test_uart
基于fpga的uart串口通信协议，64位数据(Uart communication protocol based on fpga, 64-bit data)
- 2017-08-09 17:35:47下载
- 积分：1
-
ppmencoder
一个八位的并行输入，串行输出的编码器；带有开头结尾帧。(It is an encode with eight palallel input and a serial output.)
- 2020-11-23 01:19:34下载
- 积分：1
-
GFP
这是一个EOS项目中的GFP成帧结构，能够容错，可以配置字节域(This is an EOS project GFP Framing structure, be able to fault-tolerant, can be configured byte domain)
- 2009-03-26 10:58:49下载
- 积分：1
-
dac
FPGA的驱动并行接口的DAC程序，效率较高。(FPGA-driven parallel interface of the DAC process more efficient.)
- 2011-08-04 21:48:11下载
- 积分：1
