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MifFileGen
VC++6.0软件生成Altera公司FPGA内部存储器ROM初始化数据mif格式文件。方便通过QuartusII导入波形等参数。强调这个是例子，生成的是一个定点的正弦数据表文件，需要用到的请自行修改源代码。(This software generates internal memory ROM initialization mif format data file for FPGA product by Altera. Facilitate the passage of the waveform parameters such as import QuartusII)
- 2013-07-19 02:32:45下载
- 积分：1
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Camera-Interface-Overview
主要讲述了数码相机MIPI接口协议说明，工作模式及信号传输原理等(Camera Interface Overview)
- 2014-01-20 22:19:32下载
- 积分：1
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NIOSII-Qsys_v1.3.1
黑金刚FPGA开发板使用说明文档，讲诉了NIOS和Qsys的详细开发步奏，值得学习。(KINGBOX FPGA development board documentation, recounts in detail the development of step-outs and Qsys NIOS, it is worth learning.)
- 2015-03-25 13:42:03下载
- 积分：1
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simpleCpu
relative cpu design implementation
- 2013-08-14 21:22:39下载
- 积分：1
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picoblaze实现串口通信...难道一定要20个字吗?
picoblaze实现串口通信...难道一定要20个字吗?-implement uart communication base on picoblaze
- 2022-03-31 20:43:55下载
- 积分：1
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通用：我新的FFT VHDL VHDL，我试图用Xilinx的FFT核，但当…
FFT vhdl generic: I m new to vhdl, and I tried to use xilinx fft core, but when I try to simulate it in test bench using ise simulator, I get zero results.
here is what I do:
1- from core generator I choose fft core and create .vhd & .vho & .xco files.
2- I add the .xco & .vhd files to my project.
3- I create a new vhdl source as a wrapper to the core and add the code from the .vho files where it exactly says, and take the ports of the component and add it to the entity of the wrapper file.-FFT vhdl generic: I m new to vhdl, and I tried to use xilinx fft core, but when I try to simulate it in test bench using ise simulator, I get zero results.
here is what I do:
1- from core generator I choose fft core and create .vhd & .vho & .xco files.
2- I add the .xco & .vhd files to my project.
3- I create a new vhdl source as a wrapper to the core and add the code from the .vho files where it exactly says, and take the ports of the component and add it to the entity o
- 2022-06-20 20:06:05下载
- 积分：1
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bldc_motor_control_design_example
无刷直流电机 VHDL VERILOG 控制,速度环，RS232 串口接收发送 始终分频 PWM生成 电机相序 actel FPGA使用-VERILOG BLDC control of the use of actel FPGA( actel VERILOG BLDC control of the use of actel FPGA)
- 2020-10-29 09:19:57下载
- 积分：1
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xintf-fpga
本程序主要是实现xinlinx fpga与dsp之间的双工通信(This program is to achieve duplex communication between xilinx fpga and dsp)
- 2021-02-10 18:29:52下载
- 积分：1
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zhuangtai
状态机的典型饮用，可供学习模仿之用，四个状态，简单易学(State machine of the typical drinking, can be used to learn to imitate, four state, easy to learn)
- 2007-11-11 21:36:15下载
- 积分：1
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quartus环境下开发的三人表决器（三种不同的描述方式）maxplusII兼容...
quartus环境下开发的三人表决器（三种不同的描述方式）maxplusII兼容
- 2022-06-27 14:06:35下载
- 积分：1
