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fpga_12864
这是基于Nios II的12864液晶点亮程序，包含汉字、字符等(This is a program which is based on Nios II ,its function is light the 12864 LCD that including Chinese characters, characters)
- 2012-07-02 17:28:21下载
- 积分：1
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简易环形FIFO的设计、简单异步串行通信接口设计等
简易环形FIFO的设计、简单异步串行通信接口设计等-verilog
- 2022-01-25 19:03:58下载
- 积分：1
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CSC_mat
彩色空间转换，RGB和YUV互转的matlab源码(RGB converting to YUV, YUV converting to RGB, Matlab source code)
- 2014-12-24 10:15:57下载
- 积分：1
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一个同步有限状态机（FSM）的设计是一个数字的共同任务…
Designing a synchronous finite state machine (FSM) is a common task for a digital
logic engineer. This paper discusses a variety of issues regarding FSM design using
Synopsys Design Compiler. Verilog and VHDL coding styles are presented, and
different methodologies are compared using real-world examples.
- 2022-01-26 02:12:10下载
- 积分：1
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Source code for asyn_fifo using verilog language.
异步FIFO 设计源代码，内涵完整的verilog源代码和测试代码。-Source code for asyn_fifo using verilog language.
- 2022-04-14 15:20:53下载
- 积分：1
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irda.tar
depends on irda transmitter recever
- 2009-11-20 00:31:48下载
- 积分：1
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（1）距离算法研究和设计；
（2）采用FPGA/CPLD实现。
（1）距离算法研究和设计；
（2）采用FPGA/CPLD实现。
-(1) distance algorithm and design (2) using FPGA/CPLD implementation.
- 2022-08-13 17:17:05下载
- 积分：1
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Three-phase-power
利用FPGA，产生三相SPWM波，与后继硬件电路配合，形成三相电源。高效，实用。(Using FPGA, produce three-phase SPWM wave, with subsequent hardware circuit with the formation of three-phase power. Efficient and practical.)
- 2021-04-06 23:49:02下载
- 积分：1
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ldpc_decoder_802_3an_latest.tar
LDPC encoder and decoder, very simple
- 2015-03-10 05:35:38下载
- 积分：1
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It is then register ( shifter) PISO ( Parallel
It is then register ( shifter) PISO ( Parallel - in, serial - out)-It is then register ( shifter) PISO ( Parallel- in, serial- out)
- 2022-03-14 08:29:42下载
- 积分：1
