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half_adrrrrder
FPGA上的一个半加器实例程序,通过测试,可以直接运行在fpga开发板上。(One and a half adder example on FPGA program, through the test, can be run directly on the FPGA development board)
- 2013-12-01 12:01:31下载
- 积分:1
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在quartus软件下用VHDL语言实现DDS,可产生正弦,余弦,方波,三角波以及锯齿波。
在quartus软件下用VHDL语言实现DDS,可产生正弦,余弦,方波,三角波以及锯齿波。-In the Quartus software using VHDL language realize DDS, can generate sine, cosine, square, triangle and sawtooth waves.
- 2023-01-28 08:15:03下载
- 积分:1
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ADAPTIVEFILTER
采用vhdl代码描述自适应滤波器,具有很好的可参考性,和实用性(Vhdl code to describe the use of adaptive filter, can be found with a good nature and usefulness of)
- 2010-02-05 23:37:48下载
- 积分:1
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I2C总线111
说明: 此程序为调试通过的程序,带有I2C总线功能的程序.(this procedure through the debugging process, with I2C bus function procedures.)
- 2005-11-05 13:51:27下载
- 积分:1
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VC707_MIG_DDR3
说明: VC707_MIG_DDR3.sim文件夹中是仿真的文件:testbench和DDR3模型参数
VC707_MIG_DDR3.srcs文件夹中是源文件,包含DDR3的控制、收发模块、顶层文件(VC707_ MIG_ In ddr3.sim folder are simulation files: testbench and DDR3 model parameters
VC707_ MIG_ Ddr3.srcs folder is the source file, including DDR3 control, transceiver module, top-level file)
- 2020-10-16 19:20:53下载
- 积分:1
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immediate_divide_module
用组合逻辑实现循环除法器。稳定、安全、可靠。(Combinational logic loop divider. Stable, secure, and reliable.)
- 2012-08-30 09:08:04下载
- 积分:1
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Altera的CycloneIII Start Board,使用的PFGA是3C25,包括原理图和PCB,用Cadence Allegro打开...
Altera的CycloneIII Start Board,使用的PFGA是3C25,包括原理图和PCB,用Cadence Allegro打开-Altera
- 2022-10-05 01:50:03下载
- 积分:1
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- 2022-05-01 00:03:25下载
- 积分:1
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lovesh
NN CONTROLLER FOR UPQC
- 2012-11-12 14:01:31下载
- 积分:1
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Code
提供了《自己动手写CPU》本书每一章涉及的OpenMIPS源代码、测试程序。(It provides the OpenMIPS source code and test program in each chapter, which is written in the book "do it yourself CPU".)
- 2020-07-01 23:00:02下载
- 积分:1