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Input from the MIC for some audio and then AOUT interface from broadcast in the...
从MIC输入一段音频然后，再从AOUT的接口播放出来的verilog 的代码-Input from the MIC for some audio and then AOUT interface from broadcast in the Verilog code
- 2023-06-09 21:15:03下载
- 积分：1
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VHDL实现 8051 CPU核 Oregano Systems 8
VHDL实现 8051 CPU核 Oregano Systems 8-bit Microcontroller IP-Core-VHDL 8051 CPU nuclear Oregano Systems 8-bit Mic rocontroller IP-Core
- 2022-01-21 00:52:30下载
- 积分：1
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cadence verilog lanaguage and simulation course
cadence verilog lanaguage and simulation course
- 2022-03-03 00:45:22下载
- 积分：1
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ep9351_read_reg
ep9351芯片的一个读取寄存器的测试程序，因为他的读取方式跟别的i2c设备不同，所以重新封装了一些i2c读写的接口。(one read ep9351 chip registers testing procedures, because he read i2c device with another different way, so repackaging some i2c interface to read and write.)
- 2015-06-08 10:18:54下载
- 积分：1
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simple code of some kind of base decoder
based on verilog
simple code of some kind of base decoder
based on verilog
- 2022-01-26 06:31:39下载
- 积分：1
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DDA_xy
说明： 运用Verilog 语言进行数字积分法，将X轴和Y轴进行插补运算。(Verilog language using digital integration method, the X axis and Y axis interpolation operations.)
- 2020-11-27 18:19:30下载
- 积分：1
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LMS
用verilog编写的lms算法。可实现自适应滤波功能(Lms algorithm written in verilog. Adaptive filtering can be achieved)
- 2021-05-15 11:30:02下载
- 积分：1
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counter4b
Vivado同步计数器VHDL设计 具有异步复位和同步预置数功能 同步计数器同步计数器同步计数器(The Vivado synchronous counter VHDL is designed with asynchronous reset and synchronous preset function, synchronous counter, synchronous counter and synchronous counter.)
- 2021-03-26 14:29:13下载
- 积分：1
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dds digital shift Signal Generator, full
dds数字移相信号发生器,功能齐全通过验证-dds digital shift Signal Generator, full-featured validated
- 2022-08-15 06:38:32下载
- 积分：1
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traffic-light
Traffic light program in c presents what happens in our daily life at traffic light signals.
- 2012-11-06 06:50:15下载
- 积分：1
