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pin_lv1
一个简易的频率计，主要用检测在一定范围内的频率，当然频率过大会有误差(A simple frequency meter, mainly used for testing in a range of frequencies, of course, frequency of errors over the General Assembly)
- 2010-06-05 10:30:56下载
- 积分：1
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Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0],...
Top module name : SHIFTER (File name : SHIFTER.v)
2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.
3. Output pins: OUT [15:0].
4. Input signals generated from test pattern are latched in one cycle and are
synchronized at clock rising edge.
5. The SHIFT signal describes the shift number. The shift range is 0 to 15.
6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it
shifts input data to left.
7. When the signal SIGN is high, the input data is a signed number and it shifts with
sign extension. However, the input data is an unsigned number if the signal SIGN
is low.
8. You can only use following gates in Table I and need to include the delay
information (Tplh, Tphl) in your design.
- 2022-06-13 02:00:08下载
- 积分：1
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biaojue4
此代码实现4人表决功能，4人中有三人同意即为通过。(Four voting)
- 2013-10-29 21:46:07下载
- 积分：1
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ML605板子上的灯
ML605评估板上的流水灯，可以实现每隔0.16秒进行+1操作
#include
#include
#include
#include
#include
int main()
{
char a[] = "-100" ;
char b[] = "123" ;
int c ;
c = atoi( a ) + atoi( b ) ;
printf("c = %d
", c) ;
return 0;
- 2022-06-01 23:28:16下载
- 积分：1
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20190718
说明： uart implementation and documentation, this describes the basic steps in building your own uart module on verilog and programming them on an fpga device
- 2020-06-21 21:40:01下载
- 积分：1
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fifo_rs232
从FIFO到到RS232的实现，用于接收和缓存数据(TripAdvisor RS232 FIFO implementation for receiving data and cache)
- 2016-08-26 13:57:23下载
- 积分：1
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zidongshouhuoji
使用VHDL语言实现的一个自动售货机的程序。适合VHDL初学者使用。(VHDL language using a vending machine program. VHDL suitable for beginners.)
- 2011-04-29 21:28:00下载
- 积分：1
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这个RAR文件包含有关FPGA和CPLD的呈现。
This rar files contains the presentation about FPGA and CPLD .
- 2022-07-13 06:31:38下载
- 积分：1
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craps
this is the source code we have been working on for our project using altera de2 board. the code can be run but some of it miss the end game module, while some doesn t have the complete vga code
- 2014-05-20 15:21:23下载
- 积分：1
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FPGA
fpga 设计全攻略，很好的fpga入门提高资料(the fpga design Raiders, good fpga the Getting Started improve data)
- 2012-12-09 19:03:23下载
- 积分：1
