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test_ad9852
使用FPGA来控制DDS信号的产生，从而达到高频信号产生的目的。使用的DDS芯片为AD9852，在QuartusII下编写。(Using the FPGA to control the DDS signal generation, so as to achieve high-frequency signal generation purposes. Use of DDS chip AD9852, in the QuartusII prepared.)
- 2010-01-27 17:02:16下载
- 积分：1
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vga_core
Code VHDL for control VGA
FPGA: Xilinx, Altera
- 2012-09-09 10:54:28下载
- 积分：1
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VLSI-Paper
VLSI based question set
- 2013-04-02 18:36:26下载
- 积分：1
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shuzifujieqi
主要给出准循环的LDPC码编码实现方法，译码方法选择，并给出了帧同步的解决方法(Give the main quasi-cyclic LDPC codes achieve coding method, decoding method of selection, and give the frame synchronization solution)
- 2009-03-14 17:22:33下载
- 积分：1
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VHDL描述的简易图像缩小模块，将PAL制720×576的图片缩小为512×410，采用最近临域法，13.5MHz时钟下可实时处理PAL视频。...
VHDL描述的简易图像缩小模块，将PAL制720×576的图片缩小为512×410，采用最近临域法，13.5MHz时钟下可实时处理PAL视频。-VHDL description of a simple image to narrow the module, will be PAL system of 720 × 576 image reduced to 512 × 410, using the recent Pro-domain method, 13.5MHz clock can handle PAL video in real time.
- 2022-06-11 23:09:14下载
- 积分：1
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VHDL-the-count
利用VHDL 硬件描述语言设计一个0~9999 的加法计数器。根据一定频率的触发
时钟，计数器进行加计数，并利用数码管进行显示，当计数到9999 时，从0 开始重新计数(Use of VHDL hardware description language design a 0 ~ 9999 addition counter. According to a certain frequency of the trigger
The clock, counter add count, and use digital pipes to show that when the count to 9999, starting from 0 to count
)
- 2012-01-13 14:01:38下载
- 积分：1
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这是一个FPGA
这个是一个基于FPGA的数字图像的整数DCT变换程序，程序高性能地实现了2维DCT变换。-This is an FPGA-based digital image of the integer DCT transform process and procedures to achieve high-performance 2-D DCT transform.
- 2023-04-23 13:25:03下载
- 积分：1
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使用CORDIC实现直角坐标的转换，用VHDL乙酰胆碱…
利用cordic实现直角坐标与极坐标的转换，用vhdl实现-use cordic achieve very Cartesian coordinates with the conversion, with vhdl achieve
- 2022-03-25 16:23:25下载
- 积分：1
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VHDL design language based on 8
基于VHDL语言的设计8位CISC微处理器实例-VHDL design language based on 8-bit CISC microprocessor examples
- 2023-06-06 01:10:04下载
- 积分：1
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alu
说明： Verilog code for implementing simple ALU.
- 2019-09-25 19:40:09下载
- 积分：1
