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20190717 - Copy
this describes building spi block on verilog hdl and programming them on an fpga device
- 2020-06-21 21:40:02下载
- 积分：1
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fft_16
16点FFT，简单易理解，适合初学者了解(16 point FFT, simple and easy to understand, suitable for beginners to understand)
- 2018-05-07 16:20:10下载
- 积分：1
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PWM
基于FPGA的PWM控制器设计，包含ADC0820模块，按键扫描，PID，PWM控制器等模块，VHDL语言完成，已仿真通过(PWM controller design based on FPGA, including ADC0820 module, key scan, PID, PWM controllers and other modules, VHDL language completed, through simulation)
- 2016-05-01 15:05:58下载
- 积分：1
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ALTERA NIOS处理器，用VHDL在QUARTUS下编写，用NIOS SHELL调试通过，实验LCD液晶显示...
ALTERA NIOS处理器，用VHDL在QUARTUS下编写，用NIOS SHELL调试通过，实验LCD液晶显示-Altera NIOS processor, using VHDL in QUARTUS prepared with NIOS SHELL debug through experimental LCD
- 2022-03-20 10:53:06下载
- 积分：1
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dp_xiliux the CPLD Verilog design experiments, 7 LED demo. code test.
dp_xiliux 的 CPLD Verilog设计实验,7个LED演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, 7 LED demo. code test.
- 2023-03-22 17:40:04下载
- 积分：1
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The full version of the multiplier. I believe there is not a small improvement f...
完整版的乘法器.相信对初学者有不小的提高-The full version of the multiplier. I believe there is not a small improvement for beginners
- 2022-12-06 15:10:03下载
- 积分：1
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AXI-HP-ZYNQ
用Vivado IPI搭建的Zynq-7000 PS到PL通信过程，使用了AXI-HP接口，利用AXI-DMA IP实现直接读写DDR的过程，软件可以配置传输尺寸。(The Zynq-7000 PS to PL communication process is built by Vivado IPI. AXI-HP interface is used, and AXI-DMA IP is used to read and write DDR directly. The software can configure the transmission size.)
- 2020-12-01 20:39:27下载
- 积分：1
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hdb3
这是一个很全的HDB3译码的verilog程序，用于FPGA入门所用，verilog的入门很好的程序(This is a very wide of the HDB3 decoding verilog program for entry-FPGA used, verilog entry procedures for good)
- 2021-04-22 16:08:48下载
- 积分：1
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JESD204B_character
JESD204协议简单透彻的讲解，对做高速AD的朋友有一定的帮助(Understanding control characters in JESD204)
- 2014-10-11 16:17:23下载
- 积分：1
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VHDLgoldbook
VHDL黄金参考手册，能让你更好的学习了解VHDL语言(VHDL gold reference manual, can make you a better learn VHDL language)
- 2013-12-05 16:06:19下载
- 积分：1
