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BT656_RGB
BT656转RGB的算法实现代码,使用VORILOG语言编写(BT656-->RGB, verilog)
- 2021-02-24 09:39:39下载
- 积分:1
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VHDL-Code-For-Full-Adder-By-Data-Flow-Modelling
VHDL Code For Full Adder By Data Flow Modelling
- 2013-11-08 00:39:04下载
- 积分:1
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VHDL小程序(本人的一些小成绩哦,希望对大家有帮助)
VHDL小程序(本人的一些小成绩哦,希望对大家有帮助)-VHDL small programs (some of my small achievements Oh, we want to help)
- 2022-03-03 18:24:48下载
- 积分:1
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qiartus2use
verilog仿真硬件的工具qiartus2的使用教程,内容简单易懂,初学必备(Verilog simulation tool for hardware qiartus2 the use of tutorials, easy-to-read content, learning essential)
- 2008-06-19 08:03:04下载
- 积分:1
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Verilog HDL的PLI子程序接口,用于与用户C程序在2个方向上传输数据,可用xilinx ISE,quartusii或modelsim仿真,...
Verilog HDL的PLI子程序接口,用于与用户C程序在2个方向上传输数据,可用xilinx ISE,quartusii或modelsim仿真,-Verilog HDL PLI subroutine interfaces, for C program with the user in the direction of two transmission of data, available xilinx ISE. quartusii or modelsim simulation,
- 2022-03-21 07:59:28下载
- 积分:1
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shudianshiyan
数字电路与逻辑设计实验编程,包含多功能电子钟程序,实用,简易(Digital circuits and logic design experiments programming, including multi-function electronic clock procedures, practical, simple)
- 2011-07-07 08:52:13下载
- 积分:1
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用NiosII实现的数字钟,经过本人测试运行正常,开发环境:QuartusII6.0和NiosII IDE6.0...
用NiosII实现的数字钟,经过本人测试运行正常,开发环境:QuartusII6.0和NiosII IDE6.0-NiosII achieved with digital clock, after I run the normal tests, development environment: QuartusII6.0 and NiosII IDE6.0
- 2023-04-12 03:05:04下载
- 积分:1
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DW8051单片机的设计,用HDL设计,详细的HDL设计
DW8051单片机的设计,用HDL设计,详细的HDL设计-DW8051 microcontroller design, HDL design, detailed design of the HDL
- 2023-03-12 10:35:03下载
- 积分:1
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dac5687_interface
说明: verilog语言编写的dac5687的接口程序,串行模式控制。(written dac5687 verilog interface program, serial mode control.)
- 2021-04-23 09:38:48下载
- 积分:1
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clk
sin波形发生图形,应用智能老师款到即发了快速打击 (sin waveform generation graphics application smart teacher paragraph to that made a rapid strike)
- 2013-02-24 15:46:58下载
- 积分:1