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使用vhdl语言编写的100个常用程序的例子
使用vhdl语言编写的100个常用程序的例子-The use of VHDL language 100 examples of commonly used procedures
- 2022-08-18 05:39:29下载
- 积分：1
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fpga_security
The use of FPGAs for cryptographic applications is highly attractive for a variety of reasons but at the same time there are many open issues related to the general security of FPGAs. This contribution attempts to provide a state-of-the-art description of this topic. First, the advantages of reconfigurable hardware for cryptographic applications are discussed from a systems perspective. Second, potential security problems of FPGAs are described in detail, followed by a proposal of a some countermeasure. Third, a list of open research problems is provided. Even though there have been many contributions dealing with the algorithmic
aspects of cryptographic schemes implemented on FPGAs, this contribution appears to be the first comprehensive treatment of system and security aspects.
- 2009-05-15 07:09:06下载
- 积分：1
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UART
UART文件 包括发送器 接收器 fifo 测试文件(UART file includes a receiver transmitter fifo test files)
- 2016-06-06 20:35:02下载
- 积分：1
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tb_modular
Matlab to hdl code for Least_square testbench
- 2020-06-17 12:20:02下载
- 积分：1
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关于VHDL编程的教程,比较系统的讲解,很有用的书
关于VHDL编程的教程,比较系统的讲解,很有用的书-a book about VHDL
- 2022-01-26 14:49:07下载
- 积分：1
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breath
说明： 利用verilog写的PWM 程序，来实现产生呼吸灯的效果。(Using xerilog to generate breathing lamp)
- 2020-06-17 04:40:01下载
- 积分：1
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iq_balance
调整iq幅度不平衡的模块，可以解决载漏和边带问题。(Iq amplitude imbalance adjustment module can be resolved carrier and sideband leakage problems.)
- 2021-04-23 17:48:47下载
- 积分：1
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f_adder
一位加法全加器，可以实现低位进位输入和高位进位输出。(full adder)
- 2009-12-24 15:40:39下载
- 积分：1
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HB1
半带滤波器，用于sigma-delta DAC中的设计(Half-band filter for sigma-delta DAC design)
- 2020-12-23 10:29:06下载
- 积分：1
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dp_xiliux 的 CPLD Verilog设计实验,流水灯演示.代码测试通过.
dp_xiliux 的 CPLD Verilog设计实验,流水灯演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, water lamp demonstration. code test.
- 2023-08-11 06:35:04下载
- 积分：1
