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thesis
thesis for simple virus detection processor which is developed in xilinx
- 2015-02-18 23:51:11下载
- 积分：1
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ads7846
四线电阻式触摸屏，ads7846控制显示触摸坐标(Four-wire Resistive Touch Panel, ads7846 touch control display coordinates)
- 2009-03-31 20:07:16下载
- 积分：1
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固定的点复杂 FFT
固定的 128 点复杂 FFT
或
64/8/16 点
- 2022-02-06 02:51:48下载
- 积分：1
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EDA VHDL modules commonly used procedure, the time
EDA中常用模块VHDL程序，不同时基的计数器由同一个外部是中输入时必备的分频函数。分频器FENPIN1/2/3(50分频=1HZ，25分频=2HZ，10分频=5HZ。稍微改变程序即可实现)-EDA VHDL modules commonly used procedure, the time- with a counter by the external input is required when the sub-frequency functions. Frequency Divider FENPIN1/2/3 (50 1HZ frequency = 25 = 2HZ-frequency, frequency = 10 points Stripper. A slight change in procedure can be realized)
- 2022-07-02 21:52:46下载
- 积分：1
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Writing-Testbenches
这是一本FPGA仿真验证的经典丛书，可以从中学习到如何编写系统的testbench,也可以是IC设计中FPGA原型验证编写系统及testbench的经典书籍。((Kluwer) Writing Testbenches Functional Verification of HDL Models.pdf)
- 2015-06-20 13:39:06下载
- 积分：1
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M25P80 serial memory for applications Verilog program
针对串行存储器M25P80应用的verilog程序-M25P80 serial memory for applications Verilog program
- 2022-03-12 06:10:14下载
- 积分：1
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div_fru
介绍分频器的好资料。不光有奇数分频、偶数分频，还有小数分频。相信把这个资料理解透了后以后分频器的设计就不是问题了。(Introduction divider good information. Not only have an odd frequency, even frequency, there are fractional. I believe understanding this information through the post after the Divider is not a problem.)
- 2010-06-17 21:52:55下载
- 积分：1
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digital-system-design
基于VHDL语言的七段显示管程序， 实现9个数字循环 并且能控制播放速度(SEVEN SEGMENT DISPLAY)
- 2011-02-14 21:02:38下载
- 积分：1
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uart_tx
FPGA实现串口发送 Verilog 语言(Serial reception FPGA Verilog language.)
- 2015-11-11 13:26:49下载
- 积分：1
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fpga
FPGA代码，包含地址译码模块、16位锁存器、AD片选、死区及滤除窄脉冲、过流和短路保护、解除脉冲封锁模块、PWM模块、PWM选择
(FPGA code, including the address decoder module 16 latches, AD chip select, filter out the dead and narrow pulse, overcurrent and short circuit protection, lifting the blockade pulse module, PWM module, PWM selection)
- 2015-11-18 10:47:22下载
- 积分：1
