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欢迎大家使用该程序,是在FPGA下使用开发的。请大家使用。
欢迎大家使用该程序,是在FPGA下使用开发的。请大家使用。-Welcome to use the program is to use FPGA development. Please use the.
- 2022-06-19 03:41:34下载
- 积分:1
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multiply_8_VHDL
由8 位加法器构成的以时序方式设计的8 位乘法器,采用逐项移位相加的方
法来实现相乘的VHDL程序代码。包含几个小模块和一个顶层设计文件,运行可用。(an 8 bit multiplier combined with 8 bit adder using a design by way of timing,and it use a way of Itemized shift to implement the multiply.It include some little module and a top level design document.)
- 2014-04-11 16:58:04下载
- 积分:1
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项目: 电梯控制器
你的任务是为一个单一的"传统"的先进的电梯控制器的设计
电梯(即,简单的向上/向下按钮呼叫电梯) 在四楼经营
建设。所述的基本单电梯设计规范
以下各节。
扩展您的两部电梯的设计是可选的将会奖励你额外的奖金。
- 2022-11-23 16:55:03下载
- 积分:1
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fft
说明: fft代码,采用蝶形算法,包括C,matlab和verilog代码(fft code, using butterfly algorithm, including C, matlab and Verilog code)
- 2008-11-29 11:09:47下载
- 积分:1
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my_digital_clock
数字钟,数字电子技术课程设计常用内容,基于basys3平台(Digital clock, digital electronic technology curriculum design commonly used, based on the basys3 platform)
- 2015-06-25 19:59:57下载
- 积分:1
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deng
HDL verilog 电子密码锁 输入错误后有报警 输入正确后有提示(HDL Verilog electronic code lock input errors have prompted alarm input is correct)
- 2012-06-27 19:25:53下载
- 积分:1
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robot_7_31
使用Verilog HDL来控制机器人,六个高精密舵机,舵机运动非常流畅,舵机不抖动(FPGA to control the robot servo, six servos)
- 2012-12-07 11:11:02下载
- 积分:1
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adc0809
1、用状态机设计A/D转换器ADC0809的采样控制电路,并在数码管上显示转换结果;
2、设置有复位和启动/保持开关,要求
⑴ 复位开关用来使A/D转换器复位,并做好A/D转换准备;
⑵ 启动/保持开关用来控制A/D转换器开始连续转换或停止转换保持结果,即按一下启动/保持开关,启动A/D转换器开始转换,再按一下启/停开关,停止转换并保持结果。
3、采用Verilog HDL语言设计符合上述功能要求的控制电路。(1, with the state machine design A/D converter ADC0809 sampling control circuit and display the results on the digital conversion 2 is provided with a reset and start/hold switch, reset switch is used to make the request ⑴ A/D converter reset and do A/D conversion ready ⑵ start/hold switch is used to control the A/D converter starts converting or stop the conversion to maintain a continuous result that by clicking Start/hold switch, start the A/D converter to start the conversion, and then Click the start/stop switch stops the conversion and keep the results. 3, using Verilog HDL language designed to meet the functional requirements of the above-mentioned control circuit.)
- 2021-01-02 21:38:57下载
- 积分:1
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VHDL Checkers Implementation
by
Ibrahim Elbouchikhi
Amir Nader
VHDL Checkers Implementation
by
Ibrahim Elbouchikhi
Amir Nader-Tehrani
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VHDL Checkers Implementation
by
Ibrahim Elbouchikhi
Amir Nader-Tehrani
- 2022-06-13 17:00:51下载
- 积分:1
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video_compression_systems.tar
关于MPEG压缩的程序,里面有较多的源代码和完整的说明是用MICROBLAZE完成的。(On the MPEG compression process, there are more source code and complete description is completed with MicroBlaze.)
- 2008-06-13 22:23:45下载
- 积分:1