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rs232
基于 hdl语言的re232通信实验的设计，程序简单明了，一学就会(rs232 communication)
- 2012-03-26 21:41:47下载
- 积分：1
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业界标准的Verilog语法格式
verilog标准语法，还有很多的样例参考，学习的好资料。(Verilog standard grammar, there are many examples for reference, good learning materials.)
- 2020-06-15 22:50:02下载
- 积分：1
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三角波的产生
这是源代码，该代码为三角波的一代，在 VHDL 写。欢迎下载。谢谢你的支持。
- 2022-08-03 08:08:41下载
- 积分：1
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8位CPU的VHDL设计代码没有测试
8 bit cpu vhdl design code not tested
- 2022-03-21 20:07:37下载
- 积分：1
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10_ImageEdge
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像边缘提取(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image edge extraction)
- 2020-10-23 20:27:22下载
- 积分：1
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CycloneII_NiosII_2C35_Rev02_DB_SCH
说明： nios开发板电路图CycloneII_NiosII_2C35_Rev02_DB_SCH.zip(nios development board circuit CycloneII_NiosII_2C35_Rev02_DB_SCH.zip)
- 2010-03-28 20:50:27下载
- 积分：1
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硬件设计vhdl_cpu1，1。您可以复制和分发该副本…
硬件设计vhdl_cpu1,1. You may copy and distribute verbatim copies of this core, as long -- as this file, and the other associated files, remain intact and -- unmodified. Modifications are outlined below.-hardware design vhdl_cpu1, 1. You may copy and distribute verbatim copies of this core, as long-- as this file, and the other associated files, remain intact and-- unmodified. Modifications are outlined below.
- 2022-02-06 23:06:37下载
- 积分：1
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data_swith
verilog 代码实现串并转换，有延迟(Verilog code and string conversion, delay)
- 2011-07-31 23:58:17下载
- 积分：1
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Subway_VHDL
模拟地铁自动售票机选票、付款、取票、找零等功能，包含软件仿真和硬件响应，可供仿真测试和FPGA验证。(Analog subway ticket vending machine ballots, payment, tickets, give change and other features, including software simulation and hardware response for simulation and FPGA verification test.)
- 2016-03-14 10:44:14下载
- 积分：1
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cpri
基于verilog的cpri接口代码，支持各种速率自由切换，量产产品实际应用代码(Cpri interface based on verilog code, support various rate free switch, production products the actual application code)
- 2015-09-21 16:59:59下载
- 积分：1
