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osiclator LED
应用背景弗鲁托PA oscilar就像联合国领导是卡瓦依,zholo罗该为什么我需要一个接着一个普通该estudielo为什么deberia darselo masticado关键技术zh0lo VHDL l0ks,就像PA presumir Y阙我书房一个接着一个普通免费,但四sintetiza Y有她comportamiento寺特拉华入伍机构sincronizar O把一osiclar DOS LED
- 2022-11-27 18:40:03下载
- 积分:1
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用状态机对A/D转换器0809的采样控制电路的实现。工具:Quartus ii 6.0 语言:VHDL...
用状态机对A/D转换器0809的采样控制电路的实现。工具:Quartus ii 6.0 语言:VHDL-State machine used for A/D converter sampling control circuit 0809 is achieved. Tools: Quartus ii 6.0 Language: VHDL
- 2022-05-14 13:34:13下载
- 积分:1
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Foundry-Flash-Verilog-code
几大代工厂的flash verilog源代码(flash verilog code)
- 2021-03-09 15:29:28下载
- 积分:1
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tb_axi4
介绍如何使用vivado来调用和封装IP核,测试AXI4总线的三种功能协议。(It describes how to use vivado to call and package IP core test three functions AXI4 bus protocol.)
- 2020-07-03 08:40:01下载
- 积分:1
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Writing-Testbenches-using-System-Verilog
writing testbench in system verilog
- 2011-12-11 06:02:47下载
- 积分:1
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8b10b_encoder_and_decoder
可编程器件厂商Altera出品的8b10b编码器源代码(Giga8b10b v10)
- 2021-01-22 16:08:40下载
- 积分:1
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sanjose_hdlcon
FFT implementation using C program
- 2014-02-11 21:01:40下载
- 积分:1
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LDPC.DIFFERENT-RATE
LDPC码不同码率对比,1/2与1/3码率对比。码长512.迭代次数50次。(Comparison of different rate of the LDPC code, 1/2 compared with the 1/3 code rate. 512 yards long. 50 times the number of iterations.)
- 2012-11-22 10:49:22下载
- 积分:1
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加法器
说明: 4位加法器,4位数字相加及进位功能的实现,主要利用Verilog语言实现,简单轻松,且代码量少(a adder which can realize 4 bit numbers adding)
- 2020-10-31 11:05:41下载
- 积分:1
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VHDL
说明: 运用VHDL描述函数发生器的各个波形,可有构成多功能函数发生器。(VHDL description of the use of various function generator waveforms, can constitute a multi-purpose function generator.)
- 2009-08-18 16:54:24下载
- 积分:1