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用VerilogHDL进行频率生成器。
yong VerilogHDL yu yan bianxie de pinlv fa sheng qi,shi yong ISE ruan jian da kai.-Used VerilogHDL to make a frequency builder.
- 2022-01-21 03:50:48下载
- 积分:1
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LFM
说明: 该程序使用Verilog语言产生LFM信号(The program uses Verilog language to generate LFM signals.)
- 2021-04-19 09:38:51下载
- 积分:1
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zynq-7000 MIZ7035开发板硬件使用手册20171102
XCZ7035的硬件平台使用说明
包括USB接口(XCZ7035 hardware platform instructions
Including USB interface)
- 2018-10-22 09:52:06下载
- 积分:1
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使用CORDIC实现直角坐标的转换,用VHDL乙酰胆碱…
利用cordic实现直角坐标与极坐标的转换,用vhdl实现-use cordic achieve very Cartesian coordinates with the conversion, with vhdl achieve
- 2022-03-25 16:23:25下载
- 积分:1
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半加器
它包含与试验台硬件描述语言(VHDL)一半加法器试验台意味着项目制造商宣布他要什么时候能给一个术语 请点击左侧文件开始预览 !预览只提供20%的代码片段,完整代码需下载后查看 加载中 侵权举报
- 2023-05-06 00:50:07下载
- 积分:1
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infrared_receive
红外接收处理,根据外部波形记录波形的高低电平时间,从而得到波形数据。(Infrared receiver processing, according to the external waveform waveform record high and low times, resulting waveform data.)
- 2013-09-27 11:09:02下载
- 积分:1
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three_motor
matlab仿真MATLAB电机仿真精华50例--源代码异步电机\asymotor_stator.mdl
- 2010-01-16 22:02:43下载
- 积分:1
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FCFS_PROJECT_A
FCFS (First Come First Served) with Database
- 2014-10-09 20:23:32下载
- 积分:1
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pj2-NO.6
基于FPGA的电子密码锁设计-已在开发板上成功运行,通过老师检验。(FPGA based electronic password lock design- has been successfully developed on the development board, through the teacher inspection.)
- 2017-05-26 11:54:44下载
- 积分:1
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digital-PLL
收集的关于数字锁相环的理论模型和分析讨论,适用于FPGA的数字电路设计。(Theoretical models and analysis and discussion about digital PLL collected for FPGA-based digital circuit design.)
- 2015-02-11 10:39:31下载
- 积分:1