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VGA_Display(FPGA)
在FPGA开发平台上，通过按键控制一个弹球小游戏。输出VGA显示信号输送到显示器上显示(On the FPGA development platform button control of a pinball game. VGA output signal is supplied to the display displayed on the display)
- 2017-05-02 10:59:42下载
- 积分：1
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rs(31-19)
本源代码是RS（31,19）编码器的顶端实现程序和测试程序，此程序可以验证编码器工作与否。此代码，已在ModelSim验证通过。并附上测试时所产生的结果图像。(Source code is RS (31,19) encoder to achieve the top programs and testing procedures, this program can verify the encoder to work or not. This code has been verified in ModelSim. Together with the result when the test images.)
- 2011-05-25 20:59:37下载
- 积分：1
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vhdl,序列信号发生器，发出11101010，可更改为任意序列
vhdl,序列信号发生器，发出11101010，可更改为任意序列-vhdl, sequence signal generator, issued 11.10101 million, you can change an arbitrary sequence of
- 2023-08-12 03:05:03下载
- 积分：1
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lsb 基于可见和不可见数字水印
< 跨度 style="font-size:12.0pt;line-height:150%;font-family：""> 通过大量数字交换数据生成新的信息安全需求。用户期望的健壮的解决方案将确保法，还保证多媒体文件的真实性。此项目的图像水印算法 usingLeast 有效位 （LSB） 算法被用于信息/徽标中嵌入图像。设计过程进行 theXilinx ISE 设计套件 12.4 和硬件描述语言使用 isVHDL。模拟设计和波形在 Isim(M.81d) 模拟器中得到验证。一旦完成了设计过程，设计但在 Spartan3 FPGA 板。带水印的图像是在 goodvisual 的质量并具有好的 PSNR 值。同时可见并推行 invisiblewatermarking 计划。建议 schemehas 的有效性已表现出与实验结果的援助。Watermarkingis 更可靠、 更经济比软件编码的硬件实现。在空间域中最常见的简单 watermarkingtechnique 是通过操纵最不重要位 （lsb） 整体像素为单位）。要嵌入的水印放置在碱基图像的 LSB。空间域是不太复杂，没有变换使用，但 isn"trobust 数字式图像中的攻击，信息可以直接插入 imageinformation 的每一点或更繁忙地区的图像可以计算这样以中不那么明显的图像部分的 hidesuch 消息
- 2022-03-22 20:46:03下载
- 积分：1
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本人初学VHDL时编的比较系统的VHDL源程序 巨实用
本人初学VHDL时编的比较系统的VHDL源程序 巨实用 -I am learning more systematic series of practical VHDL source Giant
- 2022-01-26 04:42:18下载
- 积分：1
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VHDL由IEEE 1076标准定义的，IEEE标准的VHDL语言参考人…
VHDL is defined by IEEE Standard 1076, IEEE Standard VHDL Language Reference Manual (the VHDL LRM). The original standard was approved in 1987. IEEE procedures require that standards be periodically reviewed and either reaffirmed or revised. The VHDL standard was revised in 1993, 2000, and 2002. In each revision, new language features were added and some existing features enhanced. The aim in each revision was to improve the language as a tool for design and verification of digital systems.
Since the 2002 revision, there have two parallel efforts to further develop the language. The first was the VHDL Procedural Interface (VHPI) Task Force, a subcommittee of the IEEE P1076 Working Group. The VHPI Task Force prepared an interim amendment to the standard, formally approved by IEEE in March 2007. The amendment is titled IEEE 1076c, Standard VHDL Language Reference Manual―Amendment 1: Procedural Language Application Interface.
- 2023-05-31 06:40:03下载
- 积分：1
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MAC
在FPGA硬件上，使用verilog语言编写的一个乘累加器程序。(FPGA hardware, a multiply accumulator verilog language program.)
- 2012-10-18 20:28:25下载
- 积分：1
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nseval
nseval - Object evaluation, includes control method execution.
- 2014-10-15 14:18:05下载
- 积分：1
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src
Crossroad traffic lights with visualization in tcl/tk and verilog code
- 2010-07-22 03:43:55下载
- 积分：1
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VHDL programming language introduced the basic grammar, and some programming exa...
介绍了ＶＨＤＬ编程语言的基本语法，和一些编程实例-VHDL programming language introduced the basic grammar, and some programming examples
- 2023-02-13 15:55:04下载
- 积分：1
