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pulse_change
用vhdl实现脉冲宽度可控的一简单程序 仿真环境MAXPLUS-(use VHDL to achieve controllable pulse width of a simple process simulation environment Segments-)
- 2005-07-24 11:53:57下载
- 积分：1
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quartus-ii-automatically-assign-pins
quartus ii 中自动分配管脚的三种方法(quartus ii automatically assign pins are three ways)
- 2012-03-31 17:12:54下载
- 积分：1
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responder3
基于VHDL的多路抢答器，用LCD12864进行显示(Multiplex answering device based on VHDL is displayed with LCD12864)
- 2019-06-17 15:29:31下载
- 积分：1
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LVDS-application-Verilog-HDL-code
LVDS的应用的Verilog HDL例子程序(LVDS example of the application procedures for the Verilog HDL)
- 2011-09-30 20:24:02下载
- 积分：1
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ep2c5核心电路SCH
EP2C5核心电路原理图，包括protel文件及其相应封装库-EP2C5 Core circuit Sch
- 2023-02-03 21:30:03下载
- 积分：1
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jk-filpflop
这个是vhdl中很常见的jk filpflop的文件只用于很小数位的变化 其中的jk文件是up down运算都符合的(This is a very common vhdl jk filpflop file is only used for very small changes in a digital file which jk is up down operations are met)
- 2013-11-19 11:43:07下载
- 积分：1
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DE2_115_NIOS_DEVICE_LED
DE2-115开发板LED显示测试源码，对fpga开发者提供参考(DE2-115 development board LED display test source, provide a reference for fpga developer)
- 2011-09-29 15:07:10下载
- 积分：1
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SD_W_R
SD卡读写源代码.用Verilog编写.很不错.值得借鉴.特别对SD卡开发的人员!(SD card reader-writer source code. Prepared to use Verilog. Is pretty good. Be used for reference. In particular, the development of personnel SD card!)
- 2020-12-27 22:09:03下载
- 积分：1
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四位动态数码管显示数字时钟的分位和秒位。工具：Quartus ii 6.0 语言：VHDL...
四位动态数码管显示数字时钟的分位和秒位。工具：Quartus ii 6.0 语言：VHDL-4 shows the number of dynamic digital tube digital clock and seconds bit. Tools: Quartus ii 6.0 Language: VHDL
- 2023-08-13 03:20:02下载
- 积分：1
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JSFP
奇数分频-此程序对输入频率sysclk有奇数（X）分频的功能(Odd frequency- this program has an odd number of input frequency sysclk (X) frequency function)
- 2011-08-01 12:37:42下载
- 积分：1
