-
flash
fpga Verilog 控制读写flash (fpga Verilog flash )
- 2015-06-23 14:45:44下载
- 积分:1
-
miaob
电子秒表,FPGA实现,本科某课程设计,程序注释非常详细,(FPGA TIME-COUNTING)
- 2010-05-10 11:25:55下载
- 积分:1
-
8. For the key to enter a password lock, assuming that reset after the seven lam...
8对于输入密码锁的键,假设重置后七个灯显示" 0",并且使用sw1、sw2、sw3 3,只需按任意sw1、sw2、sw3,将使七个灯显示值相加" 1
- 2022-07-16 11:58:58下载
- 积分:1
-
这是使用VHDL语言编写的密码锁程序,供大家参考
这是使用VHDL语言编写的密码锁程序,供大家参考-This is the use of the VHDL code lock preparation procedures for reference
- 2023-04-25 08:05:03下载
- 积分:1
-
CIC
Efficient CIC filter Implementation using VHDL
- 2010-11-19 08:54:23下载
- 积分:1
-
FFT2
适用于NIOS II的1024点FFT C算法( 1024-point FFT C algorithm for NIOS II)
- 2010-12-04 15:32:44下载
- 积分:1
-
CPU流水线设计报告
说明: CPU课程设计要求以FPGA开发平台为例,分析 CPU 设计的流程与仿真。
本次开发使用的硬件描述语言是 Verilog 语言,使用的指令系统是一个以 MIPS 指令集为子集的指令系统,共 22 条指令,所用的设计仿真软件Modelsim。(CPU curriculum design requires FPGA development platform as an example to analyze the process and Simulation of CPU design.
The hardware description language used in this development is Verilog language, and the instruction system used is an instruction system with MIPS instruction set as a subset, with 22 instructions in total. The design simulation software Modelsim is used.)
- 2020-12-24 12:09:05下载
- 积分:1
-
Quartus
QuartusII多路选择器,数字电路环境,大三EDA技术实验(Quartus,chosen conductos in matheathics field)
- 2012-10-30 16:26:11下载
- 积分:1
-
full adder in vhdl of 4 bits
full adder in vhdl of 4 bits
- 2022-02-01 04:44:39下载
- 积分:1
-
利用FPGA实现频率测试,基于VHDL实现,具有良好的测试性能可直接使用...
利用FPGA实现频率测试,基于VHDL实现,具有良好的测试性能可直接使用-Realize the frequency of testing the use of FPGA-based VHDL realize, has a good test performance can be directly used
- 2022-07-06 19:40:12下载
- 积分:1