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dds
基于FPGA，利用vhdl语言结合matlab工具实现dds,已经仿真(Based on FPGA, VHDL language with matlab tools to achieve DDS, has simulation)
- 2013-04-22 15:36:08下载
- 积分：1
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典型的例子，从互联网上下来，希望对大家有用，
典型事例，从网上down的，希望对大家有用，-Typical examples, from the Internet down, and I hope useful for everyone,
- 2022-03-30 06:06:30下载
- 积分：1
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VHDLgoldbook
VHDL黄金参考手册，能让你更好的学习了解VHDL语言(VHDL gold reference manual, can make you a better learn VHDL language)
- 2013-12-05 16:06:19下载
- 积分：1
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SystemOfTaxiFeeBasedOnVerilogHDL
摘 要：以上海地区的出租车计费器为例，利用Verilog HDL语言设计了出租车计费器，使其具有时间
显示、计费以及模拟出租车启动、停止、复位等功能，并设置了动态扫描电路显示车费和对应时间，显示
了硬件描述语言Verilog—HDL设计数字逻辑电路的优越性。源程序经MAX+PLUS Ⅱ软件调试、优
化，下载到EPF1OK10TC144—3芯片中，可应用于实际的出租车收费系统。
关键词：Verilog HDL；电子自动化设计；硬件描述语言；MAX+PLUSⅡ(Abstract: Shanghai taxi meter as an example, the use of Verilog HDL language designed taxi meter so that it will have the time display, billing, as well as analog taxis to start, stop, reset and other functions, and set up a dynamic scanning circuit shows that the fare and the corresponding time, shows the hardware description language Verilog-HDL design of the superiority of digital logic circuits. Source by MAX+ PLUS Ⅱ software debugging, optimization, downloaded to EPF1OK10TC144-3 chip, can be applied to the actual taxi fare collection system. Keywords: Verilog HDL electronic design automation hardware description language MAX+ PLUS Ⅱ)
- 2007-09-11 10:52:52下载
- 积分：1
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cycle_measure
测量周期,此程序已经在EP2C板子上成功实现(mesure cycle)
- 2013-08-29 16:09:17下载
- 积分：1
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performance-of-pcie
本白皮书探讨了在PCI Express的因素
技术可能会影响性能。它还
提供指导如何估算
的系统性能。(This white paper explores the factors in PCI Express technology may affect performance. It also provides guidance on how to estimate the system performance.)
- 2013-10-29 10:52:43下载
- 积分：1
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W5100
使用spi模式初始化w5100，实现了快速以太网的初步建立(Using the spi mode initialization w5100, to achieve the initial establishment of a Fast Ethernet)
- 2020-08-02 20:08:35下载
- 积分：1
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这是我自己写的4人表决器源码，在xilinx Spartan3E 上已经调试成功，拿出来与大家分享！...
这是我自己写的4人表决器源码，在xilinx Spartan3E 上已经调试成功，拿出来与大家分享！-that I wrote four voting machine source code, In xilinx Spartan3E debugging has been successful, with the show to share with you!
- 2022-01-27 20:17:47下载
- 积分：1
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imply logic
由忆阻器机制设计蕴含逻辑，内含testbench仿真文件(Design implied logic by memristor mechanism, including testbench simulation file)
- 2019-04-24 15:42:24下载
- 积分：1
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基于查找表的无波发生器
采用VHDL语言设计的基于LUT的正弦波发生器，已通过调试，并给出了pics仿真结果
- 2022-05-27 16:00:57下载
- 积分：1
