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VHDL ip core的设计，软核的设计方法
VHDL ip core的设计，软核的设计方法-VHDL core of the design, soft-core design
- 2022-06-01 06:05:02下载
- 积分：1
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Verilog_HDL
华为文档《硬件描述语言Verilog基础》-目录
原来搞VHDL，刚刚开始学Verilog。觉得这个入门的提纲不错，共享一下。
(Huawei Documents " basic Verilog Hardware Description Language" - the original directory engage in VHDL, just beginning to learn Verilog. Feel that the entry of the outline of a good, share some.)
- 2009-02-21 18:02:37下载
- 积分：1
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一个高级培训班的内部资料,非常宝贵,读者可以掌握FPGA的基本思路
一个高级培训班的内部资料,非常宝贵,读者可以掌握FPGA的基本思路-A high-level training of internal information, are very valuable, readers can grasp the basic ideas FPGA
- 2022-03-13 01:35:04下载
- 积分：1
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VHDL语言实现时钟程序，用fpga开发板试过后，能够执行
VHDL语言实现时钟程序，用fpga开发板试过后，能够执行-VHDL Pang Sung-wife of mother
- 2022-05-27 01:05:27下载
- 积分：1
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table-for-sin-functionof-
DDS中的正余弦生成，初始相位相差90度，可自行改变输出频率(Cosine generation of DDS, the initial phase difference of 90 degrees, the output frequency can be changed on their own)
- 2013-12-17 22:09:56下载
- 积分：1
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VHDL由IEEE 1076标准定义的，IEEE标准的VHDL语言参考人…
VHDL is defined by IEEE Standard 1076, IEEE Standard VHDL Language Reference Manual (the VHDL LRM). The original standard was approved in 1987. IEEE procedures require that standards be periodically reviewed and either reaffirmed or revised. The VHDL standard was revised in 1993, 2000, and 2002. In each revision, new language features were added and some existing features enhanced. The aim in each revision was to improve the language as a tool for design and verification of digital systems.
Since the 2002 revision, there have two parallel efforts to further develop the language. The first was the VHDL Procedural Interface (VHPI) Task Force, a subcommittee of the IEEE P1076 Working Group. The VHPI Task Force prepared an interim amendment to the standard, formally approved by IEEE in March 2007. The amendment is titled IEEE 1076c, Standard VHDL Language Reference Manual―Amendment 1: Procedural Language Application Interface.
- 2023-05-31 06:40:03下载
- 积分：1
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It s a 8051 VHDL source code issued by Original.
它是一个8051 VHDL源代码发布的原创。
- 2022-06-17 06:19:21下载
- 积分：1
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cnt24_t
这是二十四进制计数器的源程序，有需要的同学可以参照一下！(This is 24 hexadecimal counter source, needy students can refer to you!)
- 2008-12-22 09:29:29下载
- 积分：1
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IPSO
i have coding for verilogHDL and VHDL. so please i want know that coding..
- 2012-04-24 01:01:07下载
- 积分：1
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FPGA-OFDM-communication-system
说明： 基于ofdm系统的各个模块的VHDL程序，软件是用的ISE仿真的。绝对有用。(Ofdm systems based on VHDL program of each module, the software is to use the ISE simulation. Absolutely useful.)
- 2011-03-18 16:58:35下载
- 积分：1
