-
RISC
说明： RISC全部源码，包含仿真文件，使用makefile脚本编写，能通过vcs编译(RISC all source code, including simulation files, using makefile script, can be compiled through VCS)
- 2020-04-14 22:10:52下载
- 积分：1
-
datamapping
Verilog实现数据映射，解决CPM调制中的比特流向符号的转化(Implement of data mapping with Verilog)
- 2021-03-15 16:29:22下载
- 积分：1
-
awgn511
关于5-11APSK在高斯信道中的误码率分析仿真程序，对具体调制方式及解码方式都有详细的过程(About 5-11APSK in Gaussian channel bit error rate analysis simulation program, has a detailed specific modulation and decoding process)
- 2013-03-31 21:56:28下载
- 积分：1
-
通过VHDL语言进行数字信号处理的FIR操作，可以很好的实现滤波功能，有很好的作用，...
通过VHDL语言进行数字信号处理的FIR操作，可以很好的实现滤波功能，有很好的作用，-Through VHDL languages digital signal processing FIR operation, can good realization filtering, have good role
- 2022-06-02 18:18:30下载
- 积分：1
-
Electronicorgan
利用VHDL编写的电子琴发生器，以简单的演奏电路论文(Electronic organ prepared using VHDL generator to perform a simple circuit Papers)
- 2009-03-06 08:52:10下载
- 积分：1
-
yuandaima
以GPS为时间基准，实现多传感器器数据同步采集，整合信息后发送 VERILOG语言编写 QUARTUS II环境(GPS-time basis, synchronized multi-sensor data acquisition, integration of information after sending VERILOG language environment QUARTUS II)
- 2014-10-12 19:15:45下载
- 积分：1
-
软件开发环境：ISE 7.1i
仿真环境：ISE Simulator
1. 这个实例实现通过ISE Simulator工具实现一个具有两个方向共...
软件开发环境：ISE 7.1i
仿真环境：ISE Simulator
1. 这个实例实现通过ISE Simulator工具实现一个具有两个方向共八个灯的交通灯控制器；
2. 工程在project文件夹中，双击traffic.ise文件打开工程；
3. 源文件在rtl文件夹中，traffic.v为设计文件，traffic_tb.tbw是仿真波形文件；
4. 打开工程后，在工程浏览器中选择traffic_tb.tbw，在Process View中双击“Simulation Behavioral Model”选项，进行行为仿真，即可得到仿真结果。-Software development environment: ISE 7.1i simulation environment: ISE Simulator1. Realize this instance through the ISE Simulator tool to achieve a total of eight lights in both directions of traffic lights controller 2. Works project folder, double-click traffic.ise Open the project document 3. rtl source file in the folder, traffic.v for design documents, traffic_tb.tbw is the simulation waveform files 4. to open a project, the project browser, select traffic_tb.tbw, in the Process View in the double hit
- 2022-08-09 15:58:02下载
- 积分：1
-
LCD_test
this a example for the LCD for altera FPGA cyclone ii EP2C8. implemented in verilog. tested using altera EP2C8 fpga
- 2013-07-25 14:43:43下载
- 积分：1
-
Writing Testbenches using System Verilog
Material to learn how to use system verilog and how to write testbenches for verification.
- 2018-02-09 17:24:25下载
- 积分：1
-
ps2_key_dds_50M
利用xilinx开发板，使用嵌入式系统，编写的ps2键盘和利用dds原理产生正弦波的程序(Using xilinx development board, the use of embedded systems, the preparation of the ps2 keyboard and use the procedures dds elements of the sine wave)
- 2010-10-26 18:22:33下载
- 积分：1
