登录
首页 » VHDL » 软件开发环境ISE 7.1i仿真环境:ModelSim SE 6…

软件开发环境ISE 7.1i仿真环境:ModelSim SE 6…

于 2022-02-19 发布 文件大小:152.68 kB
0 106
下载积分: 2 下载次数: 1

代码说明:

软件开发环境:ISE 7.1i 仿真环境:ModelSim SE 6.0 1. 这个实例实现通过ModelSim工具实现一个具有“百分秒,秒,分”计时功能的数字跑表; 2. 工程在project文件夹中,双击paobiao.ise文件打开工程; 3. 源文件在rtl文件夹中,paobiao.v为设计文件,paobiao_tb.tbw是仿真测试文件; 4. 打开工程后,在工程浏览器中选择paobiao_tb.tbw,在Process View中双击“Simulation Behavioral Model”选项,若正确安装ModelSim,系统将自动打开ModelSim进行行为仿真,运行仿真即可得到仿真结果。-Software development environment: ISE 7.1i simulation environment: ModelSim SE 6.01. Realize this instance through the ModelSim tool realize a

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • PipelineSim
    一个计算机原理课程设计的作业,5级流水线CPU,指令集到代码均为自己设计,有最终报告文档,组建说明,并行除法,16位字长,定长指令,Verilog源代码,顶层设计图。结构简单,冲突解决方式也很简单,代码量小。(A computer theory course design work, five pipelined CPU, instruction set to the code are design, the final report documents the formation of parallel division, 16-bit word length, fixed-length instructions, Verilog source code, top level design. Simple structure, conflict resolution is also very simple, a small amount of code.)
    2012-06-24 22:19:14下载
    积分:1
  • VHDLexample
    VHDL开发程序,有程序仿真的截图,方便验证调试结果。并有程序说明(VHDL 驴 陋 垄 鲁 脤臑貌 拢 卢 脫臑 鲁 脤臑貌 脗脮忙渭脛 陆 脴脥 录拢卢路陆卤 茫脩茅脰 陇 渭 梅 脢脭 陆 谩 鹿 没 隆 拢 虏 垄 脫臑 鲁 脤臑貌脣渭脙 梅)
    2008-04-10 16:11:04下载
    积分:1
  • 用VHDL编写的4、7、40、64、84计数器,可将程序中的具体数字设成任意值。...
    用VHDL编写的4、7、40、64、84计数器,可将程序中的具体数字设成任意值。-Using VHDL written 4,7,40,64,84 counter, you can program specific figures set to any value.
    2023-02-12 05:30:04下载
    积分:1
  • alu2
    verilog alu 8bit for engineers
    2011-05-26 11:32:21下载
    积分:1
  • WCDMA-Frequency-Domain-Interference-Cancellation-f
    WCDMA数字频域干扰抵消器,绝对的高手写的文档和代码,里面资料齐全方便自学,是很好的学习FPGA实现无线通信模块的资料。(WCDMA Frequency Domain Interference Cancellation figures, the absolute master of written documentation and code, which complete information to facilitate self-learning, is a very good learning FPGA implementation of wireless communications and information.)
    2010-10-31 23:22:34下载
    积分:1
  • cyc2_cii5v1
    这是1C6开发板上元件的具体资料。此开发板有掉电不丢失程序的功能,就是靠着几个芯片(development board components specific information. This development board is not lost restart procedures, it was relying on a few chips)
    2007-02-15 10:22:14下载
    积分:1
  • MifFileGen
    VC++6.0软件生成Altera公司FPGA内部存储器ROM初始化数据mif格式文件。方便通过QuartusII导入波形等参数。强调这个是例子,生成的是一个定点的正弦数据表文件,需要用到的请自行修改源代码。(This software generates internal memory ROM initialization mif format data file for FPGA product by Altera. Facilitate the passage of the waveform parameters such as import QuartusII)
    2013-07-19 02:32:45下载
    积分:1
  • laplace
    Laplace可以应用于图像的锐化,根据其原理,对于Laplace后的图像同样可以进行边缘检测。(Laplace can be applied to image sharpening. According to its principle, edge detection can also be performed for images after Laplace.)
    2020-07-15 18:28:50下载
    积分:1
  • can总线
    说明:  SJA1000的ip核和相关测试脚本,OPENCORES 下载(SJA1000 IP downloads from opencores)
    2019-11-15 10:07:14下载
    积分:1
  • 一般网站上都有i2c master模块的代码,但很少有slave的代码,这里就是slave的代码,非常有用....
    一般网站上都有i2c master模块的代码,但很少有slave的代码,这里就是slave的代码,非常有用.-general website have i2c master module of code, but very few slave code, This is the slave code, very useful.
    2022-07-18 10:45:08下载
    积分:1
  • 696516资源总数
  • 106478会员总数
  • 6今日下载