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杉木过滤器
应用背景与转置结构的FIR滤波器的设计基于延迟元件作为D触发器单元。加法器乘法器和延迟元件设计中扮演着重要的角色。它完全建成4抽头的FIR滤波器的设计与常规设计。在 ;信号处理,一个 ;有限脉冲响应(FIR) ;过滤器是一种过滤器 ; ;脉冲响应的 ; ;(或响应任何有限长度的输入)是有限 ; ;时间,因为它解决了在有限的时间内为零。这是在对比 ;无限脉冲响应(IIR)滤波器 ;,其中可能有内部反馈和可能继续无限期地回应(通常衰减)。关键技术它将实现在Xilinx ISE Design Suite 14版合成。 ;
- 2022-02-20 21:36:19下载
- 积分:1
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12_lcd12864
本实验是用LCD12864显示英文
显示
Our FPGA EDA
NIOS II
SOPC
FPGA(This experiment is shown in English with LCD12864 display Our FPGA EDA NIOS II SOPC FPGA)
- 2013-06-26 11:35:54下载
- 积分:1
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ethmac10g
千兆以太网设计,包括组包解包,可以实现大数据传输功能。(Unpack the gigabit Ethernet is designed, including group package, can realize large data transfer function.)
- 2020-09-01 16:48:09下载
- 积分:1
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Moltiplicatore-FP
moltiplicatore floating point
- 2009-05-12 20:26:28下载
- 积分:1
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HDMI_FPGA
该源码可基于FPGA设置多分辨率的HDMI显示,且其包含了完整的时序和端口、地址映射,可以很方便的将其移植(The source code can be set based on FPGA multi-resolution HDMI display, and it includes a complete timing and port, address mapping, it can be easily transplanted)
- 2020-12-17 11:09:12下载
- 积分:1
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wide_cbf
宽带波束形成,设计FIR滤波器系数。带宽为500Hz--700Hz,采样率为3000Hz,对白噪声序列进行滤波,即得到有限带宽的宽带时域信号(Broadband beamforming design FIR filter coefficients. Bandwidth of 500Hz- 700Hz, sampling rate of 3000Hz, filtered white noise sequence, ie limited bandwidth broadband time domain signal)
- 2013-03-19 09:40:45下载
- 积分:1
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jiaotongled
该源码用vhdl语言制作了一个简单的交通灯,方便大家学习~~(The source vhdl language produced by a simple traffic light, facilitate learning ~ ~)
- 2010-11-20 14:44:36下载
- 积分:1
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VHDL写的PWM发生器,仿真通过,波形基本完美,可以用于直流电机的控制...
VHDL写的PWM发生器,仿真通过,波形基本完美,可以用于直流电机的控制-PWM generator written in VHDL, simulation is passed, the basic waveform perfect, can be used for DC motor control
- 2022-09-19 14:15:03下载
- 积分:1
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20190718 - Copy
说明: this files describes how to build i2c block modules in verilog hdl and programming them on an fpga device
- 2020-06-21 21:20:02下载
- 积分:1
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在spartan-3e上利用八个led实现流水灯效果
在spartan-3e上利用八个led实现流水灯效果-Spartan-3e in the use of eight led lights to achieve the effect of flowing water
- 2022-03-21 18:10:29下载
- 积分:1