-
VHDLexample
VHDL开发程序,有程序仿真的截图,方便验证调试结果。并有程序说明(VHDL 驴 陋 垄 鲁 脤臑貌 拢 卢 脫臑 鲁 脤臑貌 脗脮忙渭脛 陆 脴脥 录拢卢路陆卤 茫脩茅脰 陇 渭 梅 脢脭 陆 谩 鹿 没 隆 拢 虏 垄 脫臑 鲁 脤臑貌脣渭脙 梅)
- 2008-04-10 16:11:04下载
- 积分:1
-
shumaguandongtai
VHDL的动态扫描显示六个数码管,包含分频代码产生25kHz的扫描信号作为时钟。(VHDL dynamic scanning display six digital tube contains 25kHz scanning signal is generated as a clock divider code.)
- 2012-11-26 14:40:42下载
- 积分:1
-
jiaotongdeng
Quartus2环境下基于VHDL状态机的交通灯程序(VHDL state machine traffic lights based on Quartus2 environment)
- 2014-01-13 21:57:00下载
- 积分:1
-
FPGA
fpga 设计全攻略,很好的fpga入门提高资料(the fpga design Raiders, good fpga the Getting Started improve data)
- 2012-12-09 19:03:23下载
- 积分:1
-
基于FPGA的多功能电子时钟的设计很经典的哦
基于FPGA的多功能电子时钟的设计很经典的哦-FPGA-based multi-functional electronic clock designs are very classic Oh
- 2022-03-21 07:02:37下载
- 积分:1
-
*** ***OC_I2C_Master使用说明*** *****
使用步骤:1.将OC_I2C_Master文件夹拷贝到安装盘alterakits...
*** ***OC_I2C_Master使用说明*** *****
使用步骤:1.将OC_I2C_Master文件夹拷贝到安装盘alterakits
ios2components目录下。
之后重新打开SOPC Builder,在可用元件列表的DeviceSOPC组中将出现OC_I2C_Master
元件,即可像其它Altera外设元件一样添加和使用。
2.hdl文件夹中包含有描述i2c逻辑的硬件描述文件,不能删除。
3.HAL文件夹包含硬件抽象层所需的文件(即驱动),不能删除。
4.inc文件夹包含有定义底层硬件的C语言头文件,不能删除.
5.I2C_doc文件夹下有关于该元件的开发文档。-********* OC_I2C_Master use*********** use these steps: 1. OC_I2C_Master folder will be copied to the installation disk alterakits ios2components directory. Re-open after the SOPC Builder, a list of available devices will appear DeviceSOPC Group OC_I2C_Master components, can be similar to other peripheral devices like Altera add and use. 2.hdl folder contains logical description i2c hardware description files, can not be deleted. 3.HAL folder contains the necessary hardware abstraction layer file (ie drivers), can not be deleted. 4.inc folder contains the definition of the underlying hardware C language header files, should not delete. 5.I2C_doc folder on the developmen
- 2022-04-07 04:49:42下载
- 积分:1
-
Chip_74HC595
用Verilog描述了一款简单逻辑芯片74HC595的功能该芯片功能为:带输出锁存的8位移位寄存器(use the verilog to describe a simple chip 74HC595 with 8-Bit Serial-In, Parallel-Out Shift Reg and High-Current 3-State Outputs Reg)
- 2020-11-29 21:49:29下载
- 积分:1
-
cordic implementation in vhdl&c
cordic implementation in vhdl&c
- 2022-10-31 01:55:03下载
- 积分:1
-
codelock
说明: 用VHDL实现密码锁功能,用状态机实现,分管理员和用户两种功能,可分别修改密码,重置密码等。(codelock,VHDL,state)
- 2010-03-19 13:32:14下载
- 积分:1
-
VHDL语言,设计一个在DE2平台的8个七段数码管上循环显示HELLO的程序
VHDL语言,设计一个在DE2平台的8个七段数码管上循环显示HELL0的程序,采用按键控制循环的速度,慢速循环时间间隔为1S,快速循环时间间隔为200ms。(VHDL language, design a platform in the DE2 8 segment digital tube display HELL0 program cycle, the speed control loop using keys, slow cycle time interval for the 1S, fast cycle time interval is 200ms.)
- 2020-07-08 20:28:56下载
- 积分:1