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ieee1588_megacore_fpga_ip
IEEE1588de FPGA 程序,已测试,可直接用,方便(IEEE1588de FPGA program has been tested, can be directly used to facilitate)
- 2021-03-26 11:59:13下载
- 积分:1
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pong_C5H
FPGA的经典例程,可以进行移植和借鉴使用(FPGA' s classic routines, can be transplanted and learn to use)
- 2011-07-23 10:15:41下载
- 积分:1
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DualPortRAM
此程序是Verilog HDL语言读写RAM的程序希望大家有用(This is Verilog HDL Promang)
- 2020-10-29 21:19:57下载
- 积分:1
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concurrent
VHDL operators basics
- 2013-09-10 14:44:51下载
- 积分:1
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UC1676C
51单片机测试程序,IC:UC1676,4线串口(51 MCU test program, IC:UC1676 4-LINE, SPI INTERFACE)
- 2020-10-17 11:17:28下载
- 积分:1
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AGC
The AGC is a smart programmable gain amplifier (PGA). The amplifier gain is adjusted based upon
the input signal level so that the output is at a specified Target Gain. The AGC can be configured to
be either a mono or stereo input / output component. For illustration purposes, the following
discussion will highlight the stereo configuration.
- 2017-12-01 17:26:59下载
- 积分:1
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PCIe_Lab(ALTERA-V5PCIe)
这一设计实例深入浅出,介绍怎样产生一个Qsys子系统。 您将产生一个含有以下组成的Qsys系统:在Cyclone IV GX收发器入门套件上,设计带嵌入式收发器的Gen1×1硬核IP的 PCI Express IP编译器。
(Qsys system: the Cyclone IV GX Transceiver Starter Kit, designed with embedded transceivers Gen1 × 1 hard IP PCI Express IP compiler.)
- 2020-12-02 18:39:25下载
- 积分:1
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阿尔特拉 发动机控制器 示例
此应用描述了步进式发动机控制器, 你可以控制发动机
- 2022-10-07 09:00:03下载
- 积分:1
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C4gx15_starter_qsys_pcie_gen1x1
PCIe demo sample code
- 2020-12-09 16:39:19下载
- 积分:1
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shizhong
VHDL写时钟,分频模块什么,实现计时。定点报时,定点闹钟,显示年月日。(verilog HDL)
- 2014-01-09 18:29:40下载
- 积分:1