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VHDL-the-count
利用VHDL 硬件描述语言设计一个0~9999 的加法计数器。根据一定频率的触发
时钟,计数器进行加计数,并利用数码管进行显示,当计数到9999 时,从0 开始重新计数(Use of VHDL hardware description language design a 0 ~ 9999 addition counter. According to a certain frequency of the trigger
The clock, counter add count, and use digital pipes to show that when the count to 9999, starting from 0 to count
)
- 2012-01-13 14:01:38下载
- 积分:1
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电梯的vhdl设计,6层楼含开关门,警报,内部请求,外部请求
电梯的vhdl设计,6层楼含开关门,警报,内部请求,外部请求-Vhdl elevator design, six floors with switch doors, alarm, internal requests and external requests
- 2022-06-27 17:04:01下载
- 积分:1
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10进制计数器的VHDL描述必须实验
10进制计数器,VHDL描述的,实验必备-10 hexadecimal counters, VHDL description of the experiment must
- 2022-03-17 18:09:21下载
- 积分:1
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GMSK
GMSK基带信号的调制解调基于SIMULINK的系统,计算误码率,(Modulation and Demodulation of GMSK Baseband Signal)
- 2019-04-18 15:33:07下载
- 积分:1
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这是一个测试键盘的代码
this a test keyboard code -this is a test keyboard code
- 2022-02-04 00:32:23下载
- 积分:1
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EP2C35开发板官方原理图,是altera的官方资料。是fpga电路设计的很好参考典范。...
EP2C35开发板官方原理图,是altera的官方资料。是fpga电路设计的很好参考典范。-EP2C35 official development board schematics, is altera of official information. Fpga circuit design is a good reference model.
- 2022-07-01 18:31:57下载
- 积分:1
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HEX_DISPLAY
Simple vhdl description to show numbers on 7-segment s on Altera DE2 board.
- 2010-02-13 21:09:15下载
- 积分:1
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基于nios ii 驱动altera de1开发板上的lcd和ps2鼠标模块工程
基于nios ii 驱动altera de1开发板上的lcd和ps2鼠标模块工程-based on the nios ii drive the lcd and ps2 module of altera de1 develop board
- 2022-03-12 01:14:50下载
- 积分:1
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04_ep2c8_vga_test
VIP FPGA板的配套例子,这个是VGA格式lcd液晶屏幕显示用。(VIP board supporting example of this is the VGA format PREVIEW.)
- 2013-10-18 19:03:37下载
- 积分:1
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dds在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过...
dds在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-dds dspbuilder under the VHDL source code and test incentives document matl ab model, the simulation under through modelsim
- 2022-06-20 23:49:32下载
- 积分:1