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EPM570并串转换器
基于CPLD器件EPM570,用VHDL语言编写的并串转换器代码,用于实现并行代码到串行代码的转换
- 2022-07-13 17:44:24下载
- 积分:1
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dp_xiliux the CPLD Verilog design experiments, serial presentation. code test.
dp_xiliux 的 CPLD Verilog设计实验,串口演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, serial presentation. code test.
- 2022-11-12 18:25:03下载
- 积分:1
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DDS
文利用直接数字频率合成器(DDS)与CPLD技术和单片机控制技术,研制和
设计了高分辨率、高稳定度的函数信号发生(Wen using direct digital frequency synthesizer (DDS) and CPLD technology and single-chip microcomputer control technology, development and
Design of high resolution, high stability function of the signal
)
- 2013-08-27 14:20:22下载
- 积分:1
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ces_svtb_2011.12
synopse sv培训lab,是学习systemverilog非常好的资料,放心下载。(synopsis sv training lab)
- 2021-04-19 11:18:51下载
- 积分:1
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Xilinx-Timing
Xilinx FPGA 时序约束资料,原厂出品,经典不需要理由(Xilinx FPGA timing constraint information, original, classic no reason)
- 2013-05-17 09:31:26下载
- 积分:1
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基于VHDL的LCD显示程序,包含完整的源代码,锁脚文件以及下载文件,可直接下载使用...
基于VHDL的LCD显示程序,包含完整的源代码,锁脚文件以及下载文件,可直接下载使用-VHDL based on the LCD display program, including complete source code, locking pin, as well as download files documents can be directly downloaded using
- 2022-03-17 09:10:47下载
- 积分:1
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usb 硬件实现 请大家多多指教
usb 硬件实现 请大家多多指教-usb hardware realize the exhibitions please everyone
- 2022-01-28 13:02:47下载
- 积分:1
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3.4
移位除乘法器带testbench好用的工程(Useful addition to the shift multiplier works with testbench)
- 2011-07-26 10:54:46下载
- 积分:1
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05_key_test
fpga key test 入门 xilinx 黑金的板子(fpga key test xilinx)
- 2017-07-27 09:27:58下载
- 积分:1
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zichengxu
一些非常有用的程序,均经过调试,让大家一块共享。(Some very useful procedure, have been testing, so that everyone shared one.)
- 2009-07-10 13:48:14下载
- 积分:1