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Verilog
Verilog经典教程，很好的学习Verilog的书籍，对学习硬件编程很有帮助。(Verilog classic handbook, good learning Verilog books, to learn hardware programming helpful.)
- 2013-08-19 11:02:51下载
- 积分：1
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VGA_1
VGA显示原理与VGA时序实现论文,详细介绍了VGA的原理
(Principle and VGA VGA display timing to achieve paper, detailing the principles VGA)
- 2021-04-27 17:58:44下载
- 积分：1
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一种基于格雷码的异步FIFO设计与实现,8*8位的fifo VHDL 源码
一种基于格雷码的异步FIFO设计与实现,8*8位的fifo VHDL 源码-Gray-code based on the Asynchronous FIFO Design and Implementation
- 2022-08-23 15:10:52下载
- 积分：1
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Verilog写的 8 位超前进位加法器
Verilog写的 8 位超前进位加法器-Verilog write 8-bit CLA
- 2023-01-24 03:30:03下载
- 积分：1
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bcd_to_dec
VHDL code for converting BCD to Decimal
- 2018-02-13 09:45:16下载
- 积分：1
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SDRAM_DDR
SDRAM_DDR控制器verilog代码及中文说明文档。(The SDRAM_DDR controller Verilog code and documentation in chinese.)
- 2013-02-06 10:48:57下载
- 积分：1
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FIFO
This is a simple example of FIFO(first in and first out) module written in verilog code(This is a simple example of FIFO (first in and first out) module written in verilog code)
- 2013-10-04 00:41:42下载
- 积分：1
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AD9516VERILOG
通过VERILOG编写的AD9516时钟芯片SPI配置代码(CONGIGURE THE ad9516)
- 2021-03-15 12:09:23下载
- 积分：1
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RS
说明： 本文设计了基于FPGA的，用verilog HDL语言描述的在伽罗华域GF（ ）上的RS（6,4）编码器。在ISE软件上用verilog HDL语言分别对每个模块进行描述，然后在软件上进行编译、仿真，最终实现RS（6,4）编码，下载之后用chipscope采集数据，分析符合仿真结果，达到设计的要求。(This paper is designed based on FPGA, described by Verilog HDL language in Galois field GF () on RS (6,4) encoder. Using the ISE software Verilog HDL language for each module is described, and then compile, simulation in software, the ultimate realization of the RS (6,4) encoding, after downloading by chipscope data acquisition, the analysis with the simulation results meet the design requirements.)
- 2017-08-25 17:59:14下载
- 积分：1
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a lot of examples and test code, useful for beginners, it is easy to get started
有很多例子及测试代码，对初学者很有帮助，很容易上手-a lot of examples and test code, useful for beginners, it is easy to get started
- 2022-02-02 14:25:45下载
- 积分：1
