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基于fpga的fskpsk信号产生器，可实现对1.2kHz和2.4kHz正弦波的采样...
基于fpga的fskpsk信号产生器，可实现对1.2kHz和2.4kHz正弦波的采样-based on the fpga and fskpsk signal generator,can achieve sample to the 1.2kHz and 2.4kHz sin wave
- 2023-08-25 08:15:03下载
- 积分：1
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tpc_vhd
完整的TPC编译码VHDL程序，直接就可以运行(TPC encoder and decoder)
- 2020-11-21 15:29:36下载
- 积分：1
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乘法器,实现了乘法和除法的功能,能够进行32位的运算
乘法器,实现了乘法和除法的功能,能够进行32位的运算-Multiplier to achieve the functions of multiplication and division to carry out 32-bit computing
- 2022-03-24 02:44:07下载
- 积分：1
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AD9767_DDS
说明： 基于fpga的DDS程序 可输出正弦波 方波 三角波 锯齿波(DDS program based on FPGA can output sinusoidal square wave triangular wave sawtooth wave)
- 2020-06-20 21:00:01下载
- 积分：1
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DDS
基于ARM的DDS信号发生器设计，可以产生各种信号的波形，生成所需要的信号，可供实验用(DDS signal generator based on ARM, can produce a variety of signal waveform can be used for experiment)
- 2013-03-29 18:49:52下载
- 积分：1
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codic
8级cordic 算法verilog (8 cordic algorithm verilog)
- 2013-08-21 11:31:46下载
- 积分：1
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20190718
说明： uart implementation and documentation, this describes the basic steps in building your own uart module on verilog and programming them on an fpga device
- 2020-06-21 21:40:01下载
- 积分：1
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emif_tt
实现dsp与fpga的emif的verilog异步实现，可实现异步读写以及相应功能模块控制，文件中包含仿真后的波形图形以及仿真测试程序，运行环境quartus ii11.0，仿真环境mmodelsim se 6.5d(Achieve dsp and fpga verilog asynchronous implementation of the emif, enabling asynchronous reading and writing as well as the corresponding function module control, the document contains graphics, and after the simulation waveform simulation testing procedures, operating environment quartus ii11.0, simulation environment mmodelsim se 6.5d)
- 2020-12-04 15:59:23下载
- 积分：1
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dianzhen
fpga实验板上16*16点阵显示汉字的程序-翻译结果fpga实验板上16*16点阵显示汉字的程序(Experimental fpga board 16* 16 dot matrix display Chinese program- translation results fpga experimental board 16* 16 dot matrix display Chinese characters in the program)
- 2013-12-24 16:28:00下载
- 积分：1
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基于sopc的IIC总线设计完整设计sopcIIC
该例子是基于sopc的IIC总线设计完整设计，分为硬件和软件部分，软件部分是用c语言编写的。该项目是个以完成的项目，据有较高的参考和经济价值。该例子是原来做过的项目。 整个项目是在Quartus II 7.0和nios IDE环境下开发。
(This example is based on the IIC bus design sopc complete design, divided into hardware and software, the software part is written in c language. The project is to complete the project, according to the reference and a higher economic value. The example is a project originally done. The whole project is in the Quartus II 7.0 and the nios IDE development environment.)
- 2020-07-12 00:58:53下载
- 积分：1
