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一个完整的viterbi译码程序和测试的程序
一个完整的viterbi译码程序和测试的程序-A complete viterbi decoding procedures and test procedures
- 2023-01-14 14:40:03下载
- 积分：1
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UART_DMA
UART_DMA的方法是使用nios实现UART方式实现DMA传输，在硬件平台上通过验证实现(UART_DMA way is to use uart dma transfer nios implemented in the hardware platform validated by)
- 2020-11-03 10:39:53下载
- 积分：1
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基于DDS的DA正弦波输出
Sample behavioral waveforms for design file sin_rom.vThe following waveforms show the behavior of altsyncram megafunction for the chosen set of parameters in design sin_rom.v. For the purpose of this simulation, the contents of the memory at the start of the sample waveforms is assumed to be ( 3F0, 3F1, 3F2, 3F3, ...). The design sin_rom.v has one read port. The read port has 1024 words of 10 bits each. The output of the read port is unregistered. Fig. 1 : Wave showing read operation. The above waveform shows the behavior of the design under normal read conditions. The read happens at the rising edge of the enabled clock cycle. The output from the RAM is undefined until
- 2022-01-26 04:06:16下载
- 积分：1
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基于FPGA的JPEG图像压缩芯片设计
基于FPGA的JPEG图像压缩芯片设计 -FPGA-based JPEG image compression chip design
- 2022-01-28 02:00:46下载
- 积分：1
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Verilog
verilog编程语言的讲解，有电子科技大学出版(verilog programming language to explain, there is the University of Electronic Science and Technology Publishing)
- 2013-08-14 09:21:43下载
- 积分：1
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data_swith
verilog 代码实现串并转换，有延迟(Verilog code and string conversion, delay)
- 2011-07-31 23:58:17下载
- 积分：1
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ADC TLC5510的测试程序，经过测试是非常简单和容易的
ADC TLC5510的测试程序，经过测试通过，十分简单好用-ADC TLC5510 test procedures, after the test is very simple and easy
- 2022-03-17 18:38:12下载
- 积分：1
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用Verlog HDL编写的数字钟程序，包含时，分，秒，进位，解码，扫描显示等功能。...
用Verlog HDL编写的数字钟程序，包含时，分，秒，进位，解码，扫描显示等功能。-Written by Verlog HDL ，a digital clock program, including hours, minutes, seconds, into the place, decoding, scanning display.
- 2023-02-05 04:55:03下载
- 积分：1
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1_ADDER
说明： 第1例到第6例的源描述都是从第8例的程序包中
提取出来的,不能单独编译,这些例子的编译与
模拟请参考第8例.(Example No. 1 to the first six cases are the source described in Example 8 from the first package to extract it and can not be a separate compiler, which compiler and simulation examples please refer to the first eight cases.)
- 2008-09-09 18:00:16下载
- 积分：1
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binary_adder_subtractor
binary adder / subtracter in vhdl
- 2012-12-10 14:54:57下载
- 积分：1
