-
verilog
说明： verilog开发的经典教材，详细介绍了语法，常见历程，以及通用的程序段(verilog development of the classic materials, detailed information on syntax, common history, as well as the common program segment)
- 2010-03-18 12:11:18下载
- 积分：1
-
integrator
this code for integrator for 8 bit signal
- 2010-01-07 16:06:04下载
- 积分：1
-
用例化语句和case语句编写的全加器的VHDL描述。
用例化语句和case语句编写的全加器的VHDL描述。-Of statements were prepared using the full adder of the VHDL description.
- 2022-01-26 02:45:15下载
- 积分：1
-
TCL2543
基于FPGA的TLC2543控制器,采用状态进行控制ADC进行转换(The TLC2543 controller based on FPGA, using state control of ADC conversion)
- 2020-11-18 15:59:39下载
- 积分：1
-
基于FPGA的温度计源代码，VHLL语言
基于FPGA的温度计源代码，VHLL语言-Thermometer-based FPGA source code, VHLL language
- 2023-06-09 16:00:03下载
- 积分：1
-
hamming
verilog语言实现一个CPU，汇编程序实现汉明编码功能，输入11位代码，输出15位编码结果。(Verilog language to achieve a CPU, assembler to achieve Hamming coding function, enter 11 bit code, output 15 bit encoding results.)
- 2020-07-03 14:00:01下载
- 积分：1
-
dingshi
定时器加数码管显示源码，以及test bench测试模块源码，经modelsim仿真结果正确(Timer plus digital display source code, and test bench test module source code, by modelsim simulation results are correct)
- 2013-07-27 10:34:41下载
- 积分：1
-
温度码到二进制吗的转换的ｖｅｒｉｌｏｇＨＤＬ代码。
温度码到二进制吗的转换的ｖｅｒｉｌｏｇＨＤＬ代码。-Temperature code to do the conversion of binary code verilogHDL.
- 2022-02-28 22:15:49下载
- 积分：1
-
HDB3_encoder_QuartusPrj
说明： HDB3编码Quartus2 10.0的工程，modelsim仿真，有实物图、仿真图以及源程序，适合做通信原理课程设计的同学参考使用(HDB3 encoding Quartus2 10.0 project, modelsim simulation, there are physical map, simulation diagrams and source code, suitable for students of communication theory courses designed for reference use)
- 2011-03-25 08:35:32下载
- 积分：1
-
sdram_module3
能够实现16位的SDRAM的读写，没有仿真文件，只有SDRAM读写的源代码，用Verilog编写(can complete read or write sdram， only include Verilog code and no simulation files)
- 2013-11-25 12:43:11下载
- 积分：1
