-
A VHDL design with the use of powerful 32
一个使用VHDL设计的具有强大功能的32位CPU，这个文件包含了与之配套的PCI位码文件及配置程序。-A VHDL design with the use of powerful 32-bit CPU, this document contains a complete set of the PCI code files and configuration procedures.
- 2022-08-10 06:36:50下载
- 积分：1
-
vhdl语言描述分频器，实现2、4、8、16……分频，经过实践
vhdl语言描述分频器，实现2、4、8、16……分频，经过实践-description language VHDL divider, 2,4,8,16 ... ... realize frequency, through the practice of
- 2022-10-30 11:40:03下载
- 积分：1
-
error-detection-device
使用Verilog语言编程，在Quartus ii 上实现的误码检测装置，并通过单片机将误码结果显示在LCD上。本代码具有一定的工程实践价值。(Using the Verilog language programming, implemented on the Quartus ii error detection device, and the result of errors by the microcontroller on the LCD display. The code has some value engineering practice.)
- 2021-05-12 17:30:03下载
- 积分：1
-
pj_gtx
利用高速口GTX进行快速的数据传输，包括接受和发送模块，用途广泛(The use of high-speed port GTX for fast data transmission, including receiving and sending modules, has a wide range of uses.)
- 2019-03-25 21:40:10下载
- 积分：1
-
Spartan-6-PCIE_tutorial1
xilinx Spartan 6 PCIE仿真教程，PIO方式，带有TLP包分析。(XILINX PCIE tutorial device spartan6
PCIE core version V2.4)
- 2020-11-23 19:19:33下载
- 积分：1
-
txt_util
VHDL库，仿真时使用的，包括打印，类型转换等实用的操作(Practical operation VHDL library, using simulation, including print, type conversion, etc.)
- 2014-05-23 13:07:31下载
- 积分：1
-
8051参考设计，和其他免费知识产权在8051相比，相对整个D。
8051参考设计，与其他8051的免费IP相比，文档相对较全，Oregano System 提供-8051 reference design, and other free IP in 8051 compared to relatively entire document, Oregano System for
- 2023-01-19 15:30:04下载
- 积分：1
-
Divider-vhdl
This is a divider, which is depicted as well.
It is a programming language Vhdl.
- 2013-09-29 18:28:11下载
- 积分：1
-
banjian
完成一个1位全减器的设计。以全减器为元件程序完成8位减法器设计。(Completed a one minus the whole design. Full reduction is to complete eight subtraction element program design.)
- 2015-06-26 21:17:49下载
- 积分：1
-
对16×16次VHDL实例，如果需要详细的请让我知道
VHDL examples for 16x16 times, if need detail pls let me know
- 2022-04-08 01:26:55下载
- 积分：1
