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实验17 ADC实验
鉴于stm32在keil平台上的ADC采集转化,在LCD屏上显示程序(voltage acquisition adc)
- 2020-06-20 12:40:02下载
- 积分:1
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AD
说明: FPGA实现的AD采样控制程序的源码,欢迎大家下载(FPGA implementation of the AD sampling control)
- 2021-04-14 21:18:55下载
- 积分:1
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寄存器的VHDL源码.可能有点简单 新手大家间量 希望和大家学习...
寄存器的VHDL源码.可能有点简单 新手大家间量 希望和大家学习-VHDL source register. May be a bit simple volume between novice you would like to learn
- 2022-12-21 02:40:03下载
- 积分:1
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Manchester-code-of-VHDL-program
利用FPGA实现硬件的VHLD语言的Manchester code。(Hardware implementation using FPGA VHLD language Manchester code.)
- 2013-07-14 22:08:25下载
- 积分:1
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ldpc_decoder_802_3an_latest.tar
LDPC encoder and decoder, very simple
- 2015-03-10 05:35:38下载
- 积分:1
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sram
说明: FPGA 读写 SRAM 存储块,verilog代码(Read and write SRAM memory block and Verilog code in FPGA)
- 2019-08-19 16:03:39下载
- 积分:1
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This tutorial presents some basic concepts that can be helpful in debugging of a...
This tutorial presents some basic concepts that can be helpful in debugging of application programs written in the Nios II assembly language, which run on Altera’s DE2 boards.
- 2022-08-19 12:45:10下载
- 积分:1
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VHDL开发的计数器。源程序不复杂,应该都能看懂。最重要的注意:是时序问题
VHDL开发的计数器。源程序不复杂,应该都能看懂。最重要的注意:是时序问题-VHDL development of the counter. Source code is not complicated, should be able to understand. The most important Note : Timing is the issue
- 2022-05-14 00:07:18下载
- 积分:1
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计时器程序设计
利用Quartus 综合简单的计时器功能,欢迎大家下载、参考。谢谢大家的支持!
- 2023-05-24 21:20:03下载
- 积分:1
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openmips
一个开源mips处理器verilog 源码(wishbone interface wishbone interface)
- 2020-08-16 15:48:32下载
- 积分:1