-
Read_SPI_ADC
This VHDL code takes a clock, reset, Capture_EN and SPI data LT2315 ADC and generates SPI_CLK and SPI_nCS of it and reads 12-bit serial data ADC and returns 12-bit parallel data.
- 2015-10-13 14:43:13下载
- 积分：1
-
ozgul2013
说明： Digital pre-distortion (DPD) is an advanced digital
signal-processing technique that mitigates the effects of power
amplifier (PA) nonlinearity in wireless transmitters. DPD plays
a key role in providing efficient radio digital front-end (DFE)
solutions for 3G/4G basestations and beyond. Modern FPGAs
are a promising target platform for the implementation of flexible
wireless DFE solutions, including DPD.
- 2019-01-05 18:20:30下载
- 积分：1
-
0702
七段数码管显示数字时 使用VHDL语言编写(VHDL The seven-segment LED display digital clock)
- 2013-03-25 22:31:09下载
- 积分：1
-
sdram
说明： SDRAM控制，通过VHDL语言编写可运行至133MHz。(SDRAM control, written in VHDL language, can run to 133MHz.)
- 2020-02-15 11:52:22下载
- 积分：1
-
src
yuv444 与yuv422相互转换verilog语言(yuv444 to yuv422)
- 2021-01-20 14:38:41下载
- 积分：1
-
CodedLOCK
基于FPGA的电子密码锁设计与实现，语言是VHDL语言，有注释(FPGA-based design and implementation of electronic locks, language is VHDL language, annotated)
- 2013-08-27 21:37:06下载
- 积分：1
-
useful
FPGA做VGA视频显示的详细资料，我找了很久才收集起的，有四篇文章，很有用(FPGA do VGA video display detailed information, I found a long time before they start collecting, with four articles, very useful)
- 2020-12-21 18:29:09下载
- 积分：1
-
5分频电路
- 2022-01-25 22:09:58下载
- 积分：1
-
33753129vhdl
对数计算源程序，能够在FPGA中计算某数的对数(Determined on the basis of the source, calculated in the FPGA to a certain number of log)
- 2009-06-17 19:41:57下载
- 积分：1
-
视频编解码lamda计算
视频编解码设计中会有涉及到图像操作代价的计算，其中通用算法lamda的计算是一个可以模块化设计的模块，代码就是实现这个功能而设计的。
- 2022-10-24 23:30:03下载
- 积分：1
