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gg
说明： FPGA实现基带成型滤波器，升余弦滚降系数，多进制调制(FPGA)
- 2010-12-20 17:55:18下载
- 积分：1
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z80_latest.tar
Vhdl design z80 for altera users
- 2013-04-24 14:47:01下载
- 积分：1
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eetop.cn_Uvm_spi_bl_reg_tb
uvm apb verification env
- 2020-08-11 16:48:27下载
- 积分：1
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FPGA_正反_可变步长_计数器
实现了一个3-10步长可变，正反向计数器，已在Spartan3E 250板子上成功实现
- 2022-02-02 19:14:18下载
- 积分：1
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CD1_PHOTO_ABLUM_1920
使用FPGA做的数码相册实验，用NIOS做了FAT32文件系统和JPEG图像解码,FPGA和SDRAM做了显示的缓存(Using FPGA to do the digital album experiment, using NIOS to do the FAT32 file system and JPEG image decoding, FPGA and SDRAM to do the display cache)
- 2016-07-13 10:04:56下载
- 积分：1
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jesd204_0_ex
jesd204b接收部分程序和带仿真历程(Jesd204b receiving part program and simulation process)
- 2020-11-26 14:49:31下载
- 积分：1
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rfid new code
In the data management system a significant role of the Data link layer is to convert the unreliable physical link between reader and tag into a reliable link. Therefore, the RFID system employs the Cyclic Redundancy Check (CRC) as an error detection scheme. In addition for reader to communicate with the multiple tags, an anti-collision technique is required. The technique is to coordinate the communication between the reader and the tags. The common deterministic anti-collision techniques are based on the Tree algorithm such as the Binary Tree and the Query Tree algorithms.
- 2019-04-30 16:54:27下载
- 积分：1
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1024bit RSA_IP verilog实现 附文档
RSA加密算法IP，用verilog实现，结构清晰，注释全面，其中包括verilog的源代码，testbench和日文的设计说明文档
./RSA_tb.v
./RSA1024_RAM.v
./RSASpec2007Oct11.pdf
- 2022-02-20 18:48:24下载
- 积分：1
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8位吠陀乘数
这里是verilog代码 ；8bit ；吠陀乘数还可以使用这个模块的设计…你想要更大的…
- 2022-06-26 00:41:05下载
- 积分：1
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Memory Slave
&此程序用于读取和写入计算机内存。内存从机使用verilog编程语言。它可以通过ISE Design Suite 14.2（Xilinx）运行
- 2022-03-21 02:40:44下载
- 积分：1
