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jk-filpflop
这个是vhdl中很常见的jk filpflop的文件只用于很小数位的变化 其中的jk文件是up down运算都符合的(This is a very common vhdl jk filpflop file is only used for very small changes in a digital file which jk is up down operations are met)
- 2013-11-19 11:43:07下载
- 积分：1
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用verilog写的CORDIC算法实现，很适合做超越函数的运算。通常用于实现正弦乘法，或者坐标变换。...
用verilog写的CORDIC算法实现，很适合做超越函数的运算。通常用于实现正弦乘法，或者坐标变换。-The cordic arithmetic implemented by verilog is adapted to exceed function.It is usually used to implement sine multiplication or coordinate tuansform.
- 2022-05-25 08:44:55下载
- 积分：1
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prob1
UART program for fun(UART)
- 2009-11-18 10:26:04下载
- 积分：1
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UART_Send_handle
这是一个很好的基于verilog的串口通信422模块，已经经过多次验证，绝对可靠，可直接使用，本人已在工程中多次使用，无误差(This is a good serial communication based on Verilog 422 module, has been repeatedly verified, absolutely reliable, can be used directly, I have repeatedly used in the project, no error)
- 2021-04-07 15:49:01下载
- 积分：1
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5.c
; for 16-bit app support
[386Enh]
woafont=dosapp.fon
EGA80WOA.FON=EGA80WOA.FON
EGA40WOA.FON=EGA40WOA.FON
CGA80WOA.FON=CGA80WOA.FON
CGA40WOA.FON=CGA40WOA.FON
- 2017-11-07 04:17:08下载
- 积分：1
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quartus-mult
mult,在quartusII中，以模块输入形式，仿真乘法器mult，得到时序图和功能图(a simulation example of mult)
- 2012-10-17 14:22:11下载
- 积分：1
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FPGA实验，实现了蜂鸣器发出不同的音调，利用按键，很好玩的...
FPGA实验，实现了蜂鸣器发出不同的音调，利用按键，很好玩的-FPGA experiment, realized the buzzer sounded a different tone, the use of keys, it is fun
- 2022-07-24 17:58:54下载
- 积分：1
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DAC0832
DAC0832的Verilog代码，适用于与ADC0809同时学习，效果明显！(DAC0832 Verilog code, applicable at the same time with ADC0809 learning, the effect is obvious!)
- 2012-10-17 11:04:32下载
- 积分：1
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VGA_DE2_6V
VGA显示彩条DE2_70开发板 验证过的(VGA display color bar DE2_70 development board validated)
- 2014-01-07 15:52:09下载
- 积分：1
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cn1
在MATLAB的SIMULINK中，用DSPBUILDER实现计数功能，控制LED指示灯.(In MATLAB SIMULINK, DSPBUILDER is used to realize counting function and control LED indicator lamp.)
- 2018-08-16 15:35:47下载
- 积分：1
