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Turbo编码器
第 2 章LUT-日志-BCJRARCHITECTUREConventionalLUT-日志-BCJR 体系结构的能量消耗不通过简单 reducingtheir 时钟频率和吞吐量大大减少。这促使我们新型建筑便开始步入 ACS 基础电路系统是专门为了在具有最少的硬件复杂度,因此较低的能耗。< 跨度 style="font-size:12.0pt;line-height:150%;font-family:""> 我们验证我们的体系结构的前提下的 LTE turbo 译码,并表明它具有订单 ofmagnitude 更低的芯片面积,因此节能降耗的 state-of-the-artLUT-Log-BCJR 实现了 71%。我们的方法与先进的马克斯-日志-BCJRimplementations 相比,便于整体能耗的在 58 米以上的传输范围减少了 10%。
- 2022-07-17 01:46:12下载
- 积分:1
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FPGA_Cordic_Atan_A
串行流水线格式:使用COrdic 算法计算反正切:向量模式下求角度 16bit :数据全部补码格式 (Serial line format: Use COrdic algorithm arctangent: seeking angle vector mode 16bit: full complement data format)
- 2014-10-13 20:55:52下载
- 积分:1
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2点基2 FFT
此代码在FPGA使用VHDL了FFT的基本思想。
- 2022-01-25 16:35:13下载
- 积分:1
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10_ImageEdge
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像边缘提取(System Generator based image processing engineering, multimedia processing FPGA implementation source code, image edge extraction)
- 2020-10-23 20:27:22下载
- 积分:1
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基于Xilinx fpga的ddr2 控制器设计方法
基于Xilinx fpga的ddr2 控制器设计方法-Xilinx fpga-based controller design method of ddr2
- 2022-08-11 18:36:22下载
- 积分:1
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Coding Files
Floating Point FP multiplication is widely used in large set of scientific and signal processing computation. Multiplication is one of the common arithmetic operations in these computations. A high speed floating point double precision multiplier is implemented on a Virtex 6 FPGA. In addition, the proposed design is compliant with IEEE 754 format and handles over flow, under flow, rounding and various exception conditions. The design achieved the operating frequency of 414.714 MHz with an area of 648 slices.
- 2017-12-13 23:58:23下载
- 积分:1
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该程序实现的是n位全加器,首先用与非门实现一位全家器,最后实现n位的全加器。...
该程序实现的是n位全加器,首先用与非门实现一位全家器,最后实现n位的全加器。-the program is to achieve the n-bit full adder, first using the door with non-realization of a family- and finally realize the full n-bit adder.
- 2022-01-24 17:35:43下载
- 积分:1
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Manchester-code-of-VHDL-program
利用FPGA实现硬件的VHLD语言的Manchester code。(Hardware implementation using FPGA VHLD language Manchester code.)
- 2013-07-14 22:08:25下载
- 积分:1
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四VHDL模块的家庭,已经过测试,在ISE8.1通过
四位全家器的VHDL语言模块,已经在ISE8.1上经过测试通过-family of four VHDL modules, has been tested on ISE8.1 through
- 2022-03-21 16:25:17下载
- 积分:1
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8086
8086微机原理实验:8251串行接口、8253计数器、数码管、跑马灯。汇编语言。(8086 microcomputer principle experiment: 8251 serial interface, the 8253 counter, digital tube, Marquee. Assembly language.)
- 2013-03-15 11:07:19下载
- 积分:1