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VHDL source code of the 100 cases, including the addition, subtraction, storage,...
VHDL的源码100例，包括加法、减法、存储、触发等，是初学者、开发人员的必备手册-VHDL source code of the 100 cases, including the addition, subtraction, storage, trigger and so on, is for beginners, developers must Manual
- 2022-06-28 13:10:26下载
- 积分：1
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vhdl语言实现的频率发生器，可以产生不同的频率
vhdl语言实现的频率发生器，可以产生不同的频率-A frequency generator wirriten by VHDL, which can generate different frequecies.
- 2022-03-10 21:02:25下载
- 积分：1
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booth4
4位的booth算法加法器，对计算机组成原理的学习有帮助，verilog语言编写(4-bit adder booth algorithm, the learning of computer organization help, verilog language)
- 2010-09-27 04:49:51下载
- 积分：1
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QuartusII brochure+ Chinese version of the manual is aimed at readers of Quartus...
QuartusII简介手册+中文版
本手册针对的读者是 Quartus II 软件的初学者，它概述了可编程逻辑设计中
Quartus II 软件的功能。 不过，本手册并不是 Quartus II 软件的详尽参考手
册。 相反，本手册只是一本指导书，它解释软件的功能以及显示这些功能如
何帮助您进行 FPGA 和 CPLD 设计。-QuartusII brochure+ Chinese version of the manual is aimed at readers of Quartus II software for beginners, it provides an overview of programmable logic design in Quartus II software. However, this manual is not the Quartus II software, a detailed reference manual. Instead, this manual is a guide book, which explained the functions of the software and show how these features help you to FPGA and CPLD design.
- 2022-07-12 19:32:51下载
- 积分：1
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verilog for full_adder
verilog for full_adder
- 2022-06-28 14:23:05下载
- 积分：1
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用vhdl编写的简易电子中设计，经过测试成功，且用记事本上载，无需阅读器进行阅读。
用vhdl编写的简易电子中设计，经过测试成功，且用记事本上载，无需阅读器进行阅读。-Use of VHDL in the preparation of simple electronic design, has been tested successfully, and use Notepad to upload without reader reading.
- 2022-10-13 17:45:03下载
- 积分：1
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squareLoop
利用平方环法提取同步载波的FPGA实现的仿真(FPGA implementation of synchronous carrier extraction using square loop method)
- 2021-01-11 17:18:49下载
- 积分：1
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weifenqi
微分器：利用数字锁相环进行位同步信号提取的关键模块(Differentiator: the use of digital phase-locked loop for bit synchronous signal extraction of key modules)
- 2020-12-01 10:39:28下载
- 积分：1
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led1
说明： 点亮led流水灯，通过调用锁相环，可以更改对应的时钟。(Lighting the LED pipelining lamp, the corresponding clock can be changed by calling the phase-locked loop.)
- 2020-06-16 07:00:01下载
- 积分：1
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digital_tsmc018
180nm数字教学库，内含各种标准数字单元(180nm digital lib for education, including standard cells)
- 2020-12-14 14:49:14下载
- 积分：1
