登录
首页 » VHDL » this project is based on jk and t flip flop using vhdl.this is the 100 correct...

this project is based on jk and t flip flop using vhdl.this is the 100 correct...

于 2022-03-24 发布 文件大小:80.67 kB
0 106
下载积分: 2 下载次数: 1

代码说明:

this project is based on jk and t flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural techniques are used. -this project is based on jk and t flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural techniques are used.

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 数字逻辑课程设计,用vhdl实现红外线传输系统的课程设计,下载验证通过...
    数字逻辑课程设计,用vhdl实现红外线传输系统的课程设计,下载验证通过-Digital logic course design, using vhdl infrared transmission system to achieve curriculum design, download verified by
    2023-07-10 17:40:03下载
    积分:1
  • 用Verlog HDL编写的数字钟程序,包含时,分,秒,进位,解码,扫描显示等功能。...
    用Verlog HDL编写的数字钟程序,包含时,分,秒,进位,解码,扫描显示等功能。-Written by Verlog HDL ,a digital clock program, including hours, minutes, seconds, into the place, decoding, scanning display.
    2023-02-05 04:55:03下载
    积分:1
  • FPGA-design-and-application
    已经正式出版,西安电子科技大学出版社,FPGA设计及应用,作者褚振勇(Has been officially published, Xi' an University of Electronic Science and Technology Publishing House, FPGA design and application, the author Zhezhengyong)
    2009-06-03 15:57:31下载
    积分:1
  • vhdl,序列信号发生器,发出11101010,可更改为任意序列
    vhdl,序列信号发生器,发出11101010,可更改为任意序列-vhdl, sequence signal generator, issued 11.10101 million, you can change an arbitrary sequence of
    2023-08-12 03:05:03下载
    积分:1
  • wrpc-v2.0_src.tar
    About 1588 PTP protocol xillinx FPGA running code and Software application, and to introduce documents, want to help everyone
    2021-04-14 16:38:55下载
    积分:1
  • RS2
    该源代码是RS(31,19)码的完整编译码程序,采用的是VerilogHDL语言,包含了RS码的编码和译码,这蛋疼的东西花费好多时间(The source code is RS (31,19) code complete encoding and decoding procedures, and spend a lot of time using is VerilogHDL language contains the encoding and decoding of RS codes, this egg pain)
    2012-09-09 13:04:41下载
    积分:1
  • FPGA
    基于FPGA的FFT处理器的实现,适合做fpga的工程技术人员参考-FPGA-based realization of the FFT processor, suitable for the engineering and technical personnel fpga reference
    2022-09-26 01:05:03下载
    积分:1
  • vhdl-cordic-atan-master
    说明:  Implementation of CORDIC atan block in VHDL
    2019-05-14 16:51:26下载
    积分:1
  • iir
    八阶巴特沃兹iir数字滤波器,四个二阶节,verilog代码实现,多路分时复用(batterworth,iir,8order,four second order section)
    2016-01-27 19:49:47下载
    积分:1
  • ALTERA 的关于对SDRAM控制器操作的verilog相关程序,很不错绝对值得借鉴。...
    ALTERA 的关于对SDRAM控制器操作的verilog相关程序,很不错绝对值得借鉴。-ALTERA on the operation of the SDRAM controller Verilog procedures, it is definitely worth a good draw.
    2022-01-26 03:51:39下载
    积分:1
  • 696518资源总数
  • 105895会员总数
  • 18今日下载